Patents by Inventor Chih-Hsuan Liu
Chih-Hsuan Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240172434Abstract: A semiconductor device includes a stacked gate structure, a plurality of stacks and a first conductive layer. The stacks are disposed aside the stacked gate structure and arranged along both a first direction and a second direction perpendicular to the first direction, wherein the stacks are extended continuously along the first direction and segmented in the second direction. The first conductive layer is disposed between segmented portions of the stacks along the second direction, wherein top surfaces of the segmented portions of the stacks are higher than a top surface of the first conductive layer.Type: ApplicationFiled: January 31, 2024Publication date: May 23, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
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Publication number: 20240088307Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
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Patent number: 11929318Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.Type: GrantFiled: May 10, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
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Patent number: 11925017Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.Type: GrantFiled: January 13, 2020Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
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Patent number: 8502250Abstract: A light emitting diode (LED) package comprising a carrier, an LED chip, a lens, and a phosphor layer is provided. The LED chip disposed on the carrier. The lens encapsulating the LED chip has a plurality of fins surrounding the LED chip and a conical indentation. The fins extending backward the LED chip radially. Each of the fins has at least one light-emitting surface and at least one reflection surface adjoining the light-emitting surface. A bottom surface of the conical indentation is served as an total reflection surface. The phosphor layer is disposed on the light-emitting surfaces of the lens. An LED package and an LED module are also provided.Type: GrantFiled: December 29, 2010Date of Patent: August 6, 2013Assignee: Industrial Technology Research InstituteInventors: Ming-Te Lin, Ming-Yao Lin, Sheng-Chieh Tai, Chih-Hsuan Liu, Kuang-Yu Tai
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Patent number: 8455888Abstract: A light emitting diode (LED) lamp including a socket, an LED module disposed on the socket, and a lamp housing assembled to the socket is provided. LED module includes a supporting member and a plurality of LED packages, wherein each LED package includes a chip carrier, a reflective member, an LED chip, a lens, and a phosphor layer. Reflective member mounted on the chip carrier has a recess for exposing parts of the chip carrier. LED chip disposed in the recess. Lens encapsulating the LED chip has a light-emitting surface, a first reflection surface bonded with the reflective member and a second reflection surface, wherein the LED chip faces the light-emitting surface of the lens.Type: GrantFiled: December 27, 2010Date of Patent: June 4, 2013Assignee: Industrial Technology Research InstituteInventors: Ming-Te Lin, Ming-Yao Lin, Shang-Pin Ying, Chih-Hsuan Liu, Kuang-Yu Tai
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Publication number: 20110284878Abstract: A light emitting diode (LED) lamp including a socket, an LED module disposed on the socket, and a lamp housing assembled to the socket is provided. LED module includes a supporting member and a plurality of LED packages, wherein each LED package includes a chip carrier, a reflective member, an LED chip, a lens, and a phosphor layer. Reflective member mounted on the chip carrier has a recess for exposing parts of the chip carrier. LED chip disposed in the recess. Lens encapsulating the LED chip has a light-emitting surface, a first reflection surface bonded with the reflective member and a second reflection surface, wherein the LED chip faces the light-emitting surface of the lens.Type: ApplicationFiled: December 27, 2010Publication date: November 24, 2011Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ming-Te Lin, Ming-Yao Lin, Shang-Pin Ying, Chih-Hsuan Liu, Kuang-Yu Tai
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Publication number: 20110284879Abstract: A light emitting diode (LED) package comprising a carrier, an LED chip, a lens, and a phosphor layer is provided. The LED chip disposed on the carrier. The lens encapsulating the LED chip has a plurality of fins surrounding the LED chip and a conical indentation. The fins extending backward the LED chip radially. Each of the fins has at least one light-emitting surface and at least one reflection surface adjoining the light-emitting surface. A bottom surface of the conical indentation is served as an total reflection surface. The phosphor layer is disposed on the light-emitting surfaces of the lens. An LED package and an LED module are also provided.Type: ApplicationFiled: December 29, 2010Publication date: November 24, 2011Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ming-Te Lin, Ming-Yao Lin, Sheng-Chieh Tai, Chih-Hsuan Liu, Kuang-Yu Tai
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Patent number: 6774894Abstract: A processing method for rendering a planar arrow object into a 3-dimensional arrow object.Type: GrantFiled: September 20, 2000Date of Patent: August 10, 2004Assignee: Ulead Systems, Inc.Inventors: Tsung-Wei Lin, Chih-Hsuan Liu, Shih-Yang Wang
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Publication number: 20020175923Abstract: A graphics processing method using depth parameters for manipulating the inter-overlapping situation between graphic objects and image objects. For each of the graphic objects, the pixels thereof are assigned to respective depth parameters by a three-dimensional transformation procedure. Each of the image objects is assigned to one constant value as its depth parameter. The rendering of the image objects and the graphic objects is performed by sequentially displaying these objects according to their depth parameters. On an overlapping region between these objects, a visible object is selected from the overlapping objects according to the depth parameters assigned to the parts of these objects corresponding to the overlapping region. The resulting image is further processed by processing surface intersections of the overlapping regions of the overlapping objects to smooth the boundary area.Type: ApplicationFiled: May 24, 2002Publication date: November 28, 2002Inventors: Tsung-Wei Lin, Chih-Hsuan Liu, Shih-Yang Wang
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Publication number: 20020118216Abstract: A method for rendering a trimmed ribbon image with a string. The user first inputs the string to be attached to the trimmed ribbon. Then a ribbon route of the trimmed ribbon is generated by a wrap function. Next, the ribbon route of the trimmed ribbon is cut into a plurality of sub-paths by several cutting points. The cutting points are determined by their slope values of tangent lines. The sub-paths and the attached string are applied by desired effect or shading functions to generate a plurality of segments of the trimmed ribbon, respectively. Finally, the segments are combined to produce the complete trimmed ribbon image.Type: ApplicationFiled: February 25, 2002Publication date: August 29, 2002Inventors: Tsung-Wei Lin, Chih-Hsuan Liu, Shih-Yang Wang