Patents by Inventor Chih-Hsun Hsu
Chih-Hsun Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240153790Abstract: Processing chambers including at least one gas reservoir connected to and in fluid communication with the lid through a fast-switching valve and a gas reservoir line are described. Processing methods, for example, etching methods, using the processing chambers are also described.Type: ApplicationFiled: November 7, 2023Publication date: May 9, 2024Applicant: Applied Materials, Inc.Inventors: Borui Xia, Chih-Hsun Hsu, Xiaoxiong Yuan, Le Zhang, David T. Or, Jiang Lu
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Patent number: 11967486Abstract: A substrate processing system includes an upper chamber and a gas delivery system to supply a gas mixture to the upper chamber. An RF generator generates plasma in the upper chamber. A lower chamber includes a substrate support. A dual ion filter is arranged between the upper chamber and the lower chamber. The dual ion filter includes an upper filter including a first plurality of through holes configured to filter ions. A lower filter includes a second plurality of through holes configured to control plasma uniformity.Type: GrantFiled: January 21, 2020Date of Patent: April 23, 2024Assignee: LAM RESEARCH CORPORATIONInventors: Andrew Stratton Bravo, Chih-Hsun Hsu, Serge Kosche, Stephen Whitten, Shih-Chung Kon, Mark Kawaguchi, Himanshu Chokshi, Dan Zhang, Gnanamani Amburose
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Publication number: 20240014072Abstract: A method of forming a semiconductor device structure includes forming a nucleation layer within at least one feature. The method includes exposing the nucleation layer to a nitrogen plasma treatment. The nitrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal growth.Type: ApplicationFiled: June 21, 2023Publication date: January 11, 2024Inventors: Tsung-Han YANG, Zhimin QI, Yongqian GAO, Rongjun WANG, Yi XU, Yu LEI, Xingyao GAO, Chih-Hsun HSU, Xi CEN, Wei LEI, Shiyu YUE, Aixi ZHANG, Kai WU, Xianmin TANG
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Publication number: 20230420295Abstract: A method and apparatus for tungsten gap-fill in semiconductor devices are provided. The method includes performing a gradient oxidation process to oxidize exposed portions of a liner layer, wherein the gradient oxidation process preferentially oxidizes an overhang portion of the liner layer, which obstructs or blocks top openings of one or more features formed within a field region of a substrate. The method further includes performing an etchback process to remove or reduce the oxidized overhang portion of the liner layer, exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxide remaining from the gradient oxidation process and the etchback process, and performing a tungsten gap-fill process to fill or partially fill the one or more features.Type: ApplicationFiled: April 11, 2023Publication date: December 28, 2023Inventors: Tsung-Han YANG, Xingyao GAO, Shiyu YUE, Chih-Hsun HSU, Shirish PETHE, Rongjun WANG, Yi XU, Wei LEI, Yu LEI, Aixi ZHANG, Xianyuan ZHAO, Zhimin QI, Jiang LU, Xianmin TANG
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Patent number: 11843401Abstract: A transmitter includes a pre-driver stage circuitry, a post-driver stage circuitry, and resistance adjustment circuits. The pre-driver stage circuitry is configured to output a second data signal according to a first data signal. The post-driver stage circuitry is configured to output a third data signal according to the second data signal. The resistance adjustment circuits are configured to provide a first variable resistor and a second variable resistor, and transmit a first power supply voltage and a second power supply voltage to at least one of the pre-driver stage circuitry or the post-driver stage circuitry, in order to adjust a slew rate of the third data signal.Type: GrantFiled: September 3, 2021Date of Patent: December 12, 2023Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventor: Chih-Hsun Hsu
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Publication number: 20230361091Abstract: An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.Type: ApplicationFiled: July 11, 2023Publication date: November 9, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Wei-Jhen Chen, Chih-Hsun Hsu, Yuan-Hung Hsu, Chih-Nan Lin, Chang-Fu Lin, Don-Son Jiang, Chih-Ming Huang, Yi-Hsin Chen
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Publication number: 20230343643Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.Type: ApplicationFiled: July 19, 2022Publication date: October 26, 2023Inventors: Chih-Hsun HSU, Shiyu YUE, Wei LEI, Yi XU, Jiang LU, Yu LEI, Ziye XIONG, Tsung-Han YANG, Zhimin QI, Aixi ZHANG, Jie ZHANG, Liqi WU, Rongjun WANG, Shihchung CHEN, Meng-Shan WU, Chun-Chieh WANG, Annamalai LAKSHMANAN, Yixiong YANG, Xianmin TANG
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Publication number: 20230343644Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed in a first process chamber to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process is performed in the first process chamber removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.Type: ApplicationFiled: November 28, 2022Publication date: October 26, 2023Inventors: Chih-Hsun HSU, Shiyu YUE, Jiang LU, Rongjun WANG, Xianmin TANG, Zhenjiang CUI, Chi Hong CHING, Meng-Shan WU, Chun-chieh WANG, Wei LEI, Yu LEI
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Publication number: 20230343645Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on exposed top surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in the top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes the oxidized portion of the seed layer. A second etch process removes portions of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.Type: ApplicationFiled: March 30, 2023Publication date: October 26, 2023Inventors: Meng-Shan WU, Chih-Hsun HSU, Jiang LU, Shiyu YUE, Chun-chieh WANG, Annamalai LAKSHMANAN, Yixiong YANG
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Patent number: 11742296Abstract: An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.Type: GrantFiled: December 28, 2020Date of Patent: August 29, 2023Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Wei-Jhen Chen, Chih-Hsun Hsu, Yuan-Hung Hsu, Chih-Nan Lin, Chang-Fu Lin, Don-Son Jiang, Chih-Ming Huang, Yi-Hsin Chen
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Publication number: 20230223237Abstract: A method of performing pulsed remote plasma etching includes arranging a substrate in a processing chamber configured to perform pulsed remote plasma etching, setting at least one process parameter of the processing chamber, supplying at least one gas mixture to an upper chamber region of the processing chamber, supplying, in an ON period, a first voltage to coils arranged around the upper chamber region to energize the at least one gas mixture and generate plasma within the upper chamber region of the processing chamber, turning off the first voltage in an OFF period to discontinue generating plasma within the upper chamber region of the processing chamber, and alternating between supplying the first voltage in the ON period and turning off the first voltage in the OFF period to generate pulsed remote plasma within the upper chamber region of the processing chamber.Type: ApplicationFiled: June 11, 2021Publication date: July 13, 2023Inventors: Wei Yi LUO, Chih-Hsun HSU, Huai-Suen SHIAU, Tianqi WANG
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Publication number: 20230187382Abstract: An electronic package is provided and includes at least one protective structure positioned between a first electronic element and a second electronic element on a carrier for reducing stresses generated inside the first electronic element and the second electronic element when a filling material is formed on the carrier, encapsulates the protective structure and comes into contact with the first electronic element and the second electronic element, thereby preventing cracking of the first electronic element and the second electronic element and improving the reliability of the electronic package.Type: ApplicationFiled: February 13, 2023Publication date: June 15, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsun Hsu, Chi-Jen Chen, Hsi-Chang Hsu, Yuan-Hung Hsu, Rui-Feng Tai, Don-Son Jiang
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Publication number: 20230113514Abstract: Processing methods described herein comprise forming a metal gate film on a narrow feature and a wide feature and depositing a hard mask on the metal gate film. The hard mask forms on the metal gate film at a top, bottom and sidewalls of the wide feature and on a top of the narrow feature to cover the metal gate film. Some processing methods comprise oxidizing the metal gate film on the narrow feature to convert a portion of the metal gate film to a metal oxide film. Some processing methods comprise etching the metal oxide film from the narrow feature to leave a gradient etch profile. Some processing methods comprise filling the narrow feature and the wide feature with a gap fill material comprising one or more of a metal nitride, titanium nitride (TiN) or titanium oxynitride (TiON), the gap fill material substantially free of seams and voids.Type: ApplicationFiled: December 3, 2021Publication date: April 13, 2023Applicant: Applied Materials, Inc.Inventors: Shih Chung Chen, Yongjing Lin, Chi-Chou Lin, Zhiyong Wang, Chih-Hsun Hsu, Mandyam Sriram, Tza-Jing Gung
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Patent number: 11610850Abstract: An electronic package is provided and includes at least one protective structure positioned between a first electronic element and a second electronic element on a carrier for reducing stresses generated inside the first electronic element and the second electronic element when a filling material is formed on the carrier, encapsulates the protective structure and comes into contact with the first electronic element and the second electronic element, thereby preventing cracking of the first electronic element and the second electronic element and improving the reliability of the electronic package.Type: GrantFiled: January 28, 2021Date of Patent: March 21, 2023Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsun Hsu, Chi-Jen Chen, Hsi-Chang Hsu, Yuan-Hung Hsu, Rui-Feng Tai, Don-Son Jiang
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Publication number: 20220173052Abstract: An electronic package is provided and includes at least one protective structure positioned between a first electronic element and a second electronic element on a carrier for reducing stresses generated inside the first electronic element and the second electronic element when a filling material is formed on the carrier, encapsulates the protective structure and comes into contact with the first electronic element and the second electronic element, thereby preventing cracking of the first electronic element and the second electronic element and improving the reliability of the electronic package.Type: ApplicationFiled: January 28, 2021Publication date: June 2, 2022Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsun Hsu, Chi-Jen Chen, Hsi-Chang Hsu, Yuan-Hung Hsu, Rui-Feng Tai, Don-Son Jiang
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Publication number: 20220148975Abstract: An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.Type: ApplicationFiled: December 28, 2020Publication date: May 12, 2022Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Wei-Jhen Chen, Chih-Hsun Hsu, Yuan-Hung Hsu, Chih-Nan Lin, Chang-Fu Lin, Don-Son Jiang, Chih-Ming Huang, Yi-Hsin Chen
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Publication number: 20220131561Abstract: A transmitter includes a pre-driver stage circuitry, a post-driver stage circuitry, and resistance adjustment circuits. The pre-driver stage circuitry is configured to output a second data signal according to a first data signal. The post-driver stage circuitry is configured to output a third data signal according to the second data signal. The resistance adjustment circuits are configured to provide a first variable resistor and a second variable resistor, and transmit a first power supply voltage and a second power supply voltage to at least one of the pre-driver stage circuitry or the post-driver stage circuitry, in order to adjust a slew rate of the third data signal.Type: ApplicationFiled: September 3, 2021Publication date: April 28, 2022Inventor: CHIH-HSUN HSU
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Publication number: 20220076924Abstract: A substrate processing system includes an upper chamber and a gas delivery system to supply a gas mixture to the upper chamber. An RF generator generates plasma in the upper chamber. A lower chamber includes a substrate support. A dual ion filter is arranged between the upper chamber and the lower chamber. The dual ion filter includes an upper filter including a first plurality of through holes configured to filter ions. A lower filter includes a second plurality of through holes configured to control plasma uniformity.Type: ApplicationFiled: January 21, 2020Publication date: March 10, 2022Inventors: Andrew Stratton BRAVO, Chih-Hsun HSU, Serge KOSCHE, Stephen WHITTEN, Shih-Chung KON, Mark KAWAGUCHI, Himanshu CHOKSHI, Dan ZHANG, Gnanamani AMBUROSE
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Publication number: 20210280530Abstract: Provided is an electronic package, including a multi-chip packaging body with a plurality of electronic elements and a stress buffer layer disposed on the multi-chip packaging body. The stress buffer layer is in contact with the plurality of electronic elements so as to cause stresses to be evenly distributed in the stress buffer layer instead of being concentrated in specific areas, thereby preventing structural stresses from being concentrated in corners of the electronic elements.Type: ApplicationFiled: May 18, 2020Publication date: September 9, 2021Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chi-Jen Chen, Chih-Hsun Hsu, Chee-Key Chung, Jia-Wei Pan, Chang-Fu Lin
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Patent number: 10790180Abstract: Electrostatic chucks with variable pixelated magnetic field are described. For example, an electrostatic chuck (ESC) includes a ceramic plate having a front surface and a back surface, the front surface for supporting a wafer or substrate. A base is coupled to the back surface of the ceramic plate. A plurality of electromagnets is disposed in the base, the plurality of electromagnets configured to provide pixelated magnetic field tuning capability for the ESC.Type: GrantFiled: September 19, 2019Date of Patent: September 29, 2020Assignee: Applied Materials, Inc.Inventors: Chih-Hsun Hsu, Tza-Jing Gung, Benjamin Schwarz, Shahid Rauf, Ankur Agarwal, Vijay D. Parkhe, Michael D. Willwerth, Zhiqiang Guo