Abstract: A semiconductor device structure includes a first dielectric wall, a plurality of first semiconductor layers vertically stacked and extending outwardly from a first side of the first dielectric wall, each first semiconductor layer has a first width, a plurality of second semiconductor layers vertically stacked and extending outwardly from a second side of the first dielectric wall, each second semiconductor layer has a second width, a plurality of third semiconductor layers disposed adjacent the second side of the first dielectric wall, each third semiconductor layer has a third width greater than the second width, a first gate electrode layer surrounding at least three surfaces of each of the first semiconductor layers, the first gate electrode layer having a first conductivity type, and a second gate electrode layer surrounding at least three surfaces of each of the second semiconductor layers, the second gate electrode layer having a second conductivity type opposite the first conductivity type.

Abstract: A method of manufacturing a package structure at least includes the following steps. An encapsulant laterally is formed to encapsulate the die and the plurality of through vias. A plurality of first connectors are formed to electrically connect to first surfaces of the plurality of through vias. A warpage control material is formed over the die, wherein the warpage control material is disposed to cover an entire surface of the die. A protection material is formed over the encapsulant and around the plurality of first connectors and the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.

Abstract: An embodiment composite material for semiconductor package mount applications may include a first component including a tin-silver-copper alloy and a second component including a tin-bismuth alloy or a tin-indium alloy. The composite material may form a reflowed bonding material having a room temperature tensile strength in a range from 80 MPa to 100 MPa when subjected to a reflow process. The reflowed bonding material may include a weight fraction of bismuth that is in a range from approximately 4% to approximately 15%. The reflowed bonding material may an alloy that is solid solution strengthened by a presence of bismuth or indium that is dissolved within the reflowed bonding material or a solid solution phase that includes a minor component of bismuth dissolved within a major component of tin. In some embodiments, the reflowed bonding material may include intermetallic compounds formed as precipitates such as Ag3Sn and/or Cu6Sn5.

Abstract: A semiconductor process system includes a process chamber. The process chamber includes a wafer support configured to support a wafer. The system includes a bell jar configured to be positioned over the wafer during a semiconductor process. The interior surface of the bell jar is coated with a rough coating. The rough coating can include zirconium.

Abstract: A package structure includes a die, an encapsulant laterally encapsulating the die, a warpage control material disposed over the die, and a protection material disposed over the encapsulant and around the warpage control material. A coefficient of thermal expansion of the protection material is less than a coefficient of thermal expansion of the encapsulant.

Abstract: A semiconductor structure includes a first tier, a redistribution circuit structure, and a second tier. The first tier includes at least one first die. The redistribution circuit structure is disposed on the first tier and electrically coupled to the at least one first die, where the redistribution circuit structure has a multi-layer structure and includes a vertical connection structure continuously extending from a first side of the redistribution circuit structure to a second side of the redistribution circuit structure, and the first side is opposite to the second side along a stacking direction of the first tier and the redistribution circuit structure. The second tier includes a plurality of second dies, and is disposed on and electrically coupled to the redistribution circuit structure.

Abstract: A method includes depositing solder paste over first contact pads of a first package component. Spring connectors of a second package component are aligned to the solder paste. The solder paste is reflowed to electrically and physically couple the spring connectors of the second package component to the first contact pads of the first package component. A device includes a first package component and a second package component electrically and physically coupled to the first package component by way of a plurality of spring coils. Each of the plurality of spring coils extends from the first package component to the second package component.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A high-speed additive manufacturing apparatus includes a main body, a sintering module, a product carrying member, a raw material carrying member, and a raw material wiper. The main body includes a printing tank and a raw material tank adjacent to the printing tank. The sintering module is arranged on the main body. The sintering module includes a plurality of sintering light source assemblies. Each of the sintered light source assemblies has a light beam emitting end. The light beam emitting end emits a sintering light beam. The light beam emitting ends of the sintering light source assemblies are arranged in a plurality of rows. Each light beam emitting end in one row is unaligned with the light beam emitting end in adjacent rows along a direction in which the light beam emitting end moves.

Abstract: An insole with heat generating system is disclosed, which comprises an insole, a piezoelectric module disposed inside the insole and electrically connected with each other to form an electrical circuit, two flexible conductive strips having a first conductive copper piece and a second conductive copper piece disposed thereon, and at least one resistive heating chip. Wherein the piezoelectric module generates the electrical energy through stepping on the insole, and then turns into the heat energy through the resistive heating chip, thereby generating a temperature for the insole, so the insole with heat generating system can adjust the temperature appropriately, its safety is high, most importantly, the invention does not need to add the battery to generate heat.

Abstract: An insole with heat generating system is disclosed, which comprises an insole, a piezoelectric module disposed inside the insole and electrically connected with each other to form an electrical circuit, two flexible conductive strips having a first conductive copper piece and a second conductive copper piece disposed thereon, and at least one resistive heating chip. Wherein the piezoelectric module generates the electrical energy through stepping on the insole, and then turns into the heat energy through the resistive heating chip, thereby generating a temperature for the insole, so the insole with heat generating system can adjust the temperature appropriately, its safety is high, most importantly, the invention does not need to add the battery to generate heat.

Abstract: An insole with heat generating system is disclosed, which comprises an insole, a piezoelectric module disposed inside the insole and electrically connected with each other to form an electrical circuit, two flexible conductive strips having a first conductive copper piece and a second conductive copper piece disposed thereon, and at least one resistive heating chip. Wherein the piezoelectric module generates the electrical energy through stepping on the insole, and then turns into the heat energy through the resistive heating chip, thereby generating a temperature for the insole, so the insole with heat generating system can adjust the temperature appropriately, its safety is high, most importantly, the invention does not need to add the battery to generate heat.

Abstract: An objective of the present invention lies in providing an insole with heat generated by pressing system, which can keep warm for wear's feet easily and safely even in the low temperature. The technical solution is that an insole with heat generated by pressing system comprising an insole, a power pressing module disposed inside the insole and electrically connected with each other to form an electrical circuit, two flexible conductive strips, and at least one resistance heating chip; said power pressing module providing power generated ay pressure, which is arranged in a heel cup of the insole, sequentially comprising a first conductive layer, a first composite sintered body, a second conductive layer, and a second composite sintered body, and an insulated strip arranged between the first conductive layer and the second conductive layer and surrounded the first composite sintered body.