Patents by Inventor Chih-Hui Chang
Chih-Hui Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250147417Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate. A first precursor and a second precursor are combined. The first precursor is an organometallic having a formula: MaRbXc, where M is one or more of Sn, Bi, Sb, In, and Te, R is one or more of a C7-C11 aralkyl group, a C3-C10 cycloalkyl group, a C2-C10 alkoxy group, and a C2-C10 alkylamino group, X is one or more of a halogen, a sulfonate group, and an alkylamino group, and 1?a?2, b?1, c?1, and b+c?4, and the second precursor is one or more of water, an amine, a borane, and a phosphine. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer to the selectively exposed photoresist layer.Type: ApplicationFiled: December 30, 2024Publication date: May 8, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Cheng LIU, Ming-Hui WENG, Jr-Hung LI, Yahru CHENG, Chi-Ming YANG, Tze-Liang LEE, Ching-Yu CHANG
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Patent number: 12293918Abstract: A method includes providing a substrate of a first conductivity type, the substrate including a first circuit region and a second circuit region; forming a first well region of a second conductivity type in the first circuit region of the substrate; forming a first doped region of the second conductivity type in the first well region; forming a diode in the second circuit region of the substrate; forming a first transistor and a second transistor over the substrate in the first circuit region and the second circuit region, respectively; forming a discharge structure over the substrate to electrically couple the first doped region to the diode; and forming a metallization layer over the discharge structure to electrically couple the first transistor to the second transistor subsequent to the forming of the diode, wherein charges accumulated in the first well region are drained to the substrate through the discharge structure.Type: GrantFiled: June 18, 2021Date of Patent: May 6, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yao-Jen Tsai, Keng-Hui Liao, Chih-Kai Yang, Chih-Fu Chang, Chia-Jen Leu, Chin-Yuan Ko
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Publication number: 20250126855Abstract: Methods for forming a gate structure of a multi-gate device are provided. An example method includes depositing a gate dielectric layer over first nanostructures over a first region of a substrate and second nanostructures over a second region of the substrate, depositing a first work function metal (WFM) layer over the first nanostructures and the second nanostructures, depositing a first hard mask (HM) layer over the first WFM layer, selectively removing the first HM layer and the first WFM layer over the first region, selectively removing the first HM layer over the second region, depositing a second WFM layer over the substrate, depositing a second HM layer over the second WFM layer, selectively removing the second HM layer and the second WFM layer over the first region, selectively removing the second HM layer over the second region, and depositing a third WFM layer over the substrate.Type: ApplicationFiled: October 12, 2023Publication date: April 17, 2025Inventors: Ming-Huei Lin, Kai-Yuan Cheng, Chih-Pin Tsao, Hsing-Kan Peng, Shih-Hsun Chang, Shu-Hui Wang, Jeng-Ya Yeh
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Patent number: 12279460Abstract: An electrostatic discharge (ESD) protection device including the following components is provided. A first transistor includes a first gate, a first N-type source region, and an N-type drain region. A second transistor includes a second gate, a second N-type source region, and the N-type drain region. The N-type drain region is located between the first gate and the second gate. An N-type drift region is located in a P-type substrate between the first gate and the second gate and is located directly below a portion of the first gate and directly below a portion of the second gate. The N-type drain region is located in the N-type drift region. A P-type barrier region is located in the P-type substrate below the N-type drift region. The P-type barrier region has an overlapping portion overlapping the N-type drift region. There is at least one first opening in the overlapping portion.Type: GrantFiled: August 9, 2022Date of Patent: April 15, 2025Assignee: Powerchip Semiconductor Manufacturing CorporationInventors: Ming-Hui Chen, Chih-Feng Lin, Chiu-Tsung Huang, Hsiang-Hung Chang
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Patent number: 12272554Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.Type: GrantFiled: July 27, 2023Date of Patent: April 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jia-Lin Wei, Ming-Hui Weng, Chih-Cheng Liu, Yi-Chen Kuo, Yen-Yu Chen, Yahru Cheng, Jr-Hung Li, Ching-Yu Chang, Tze-Liang Lee, Chi-Ming Yang
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Patent number: 12271113Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1?a?2, b?1, c?1, and b+c?5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.Type: GrantFiled: January 15, 2021Date of Patent: April 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Cheng Liu, Yi-Chen Kuo, Jia-Lin Wei, Ming-Hui Weng, Yen-Yu Chen, Jr-Hung Li, Yahru Cheng, Chi-Ming Yang, Tze-Liang Lee, Ching-Yu Chang
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Publication number: 20250053161Abstract: A manufacturing control method is applied to a computer system comprising a processor, a storage device, and a display device. The manufacturing control method includes: dividing a plurality of outlier-filtered data into a plurality of data subgroups based on a group division reference value; calculating a plurality of standard deviations for each of these data subgroups; calculating a warning line upper limit and a warning line lower limit based on the group division reference value, a predetermined multiple, and the standard deviations; adjusting either the warning line upper limit or the warning line lower limit based on the predetermined multiple and the standard deviations; and when a sensing data exceeds the warning line upper limit or the warning line lower limit, the computing system triggers a warning signal.Type: ApplicationFiled: August 24, 2023Publication date: February 13, 2025Inventors: Yung-Yu YANG, Chih-Kuan CHANG, Chung-Chih HUNG, Yu-Hsien TSAI, Chen-Hui HUANG
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Patent number: 12222643Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate. A first precursor and a second precursor are combined. The first precursor is an organometallic having a formula: MaRbXc, where M is one or more of Sn, Bi, Sb, In, and Te, R is one or more of a C7-C11 aralkyl group, a C3-C10 cycloalkyl group, a C2-C10 alkoxy group, and a C2-C10 alkylamino group, X is one or more of a halogen, a sulfonate group, and an alkylamino group, and 1?a?2, b?1, c?1, and b+c?4, and the second precursor is one or more of water, an amine, a borane, and a phosphine. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer to the selectively exposed photoresist layer.Type: GrantFiled: October 22, 2022Date of Patent: February 11, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Cheng Liu, Ming-Hui Weng, Jr-Hung Li, Yahru Cheng, Chi-Ming Yang, Tze-Liang Lee, Ching-Yu Chang
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Publication number: 20250038072Abstract: A semiconductor die includes a substrate, a semiconductor device, a back-end-of-line (BEOL) structure, and a heat dissipation structure. The substrate includes a device region and a non-device region. The BEOL structure includes a plurality of metallization layers. Each of the metallization layers includes a dielectric layer, interconnect features, and metal patterns. The interconnect features is in the dielectric layer and over the device region of the substrate, in which the interconnect features are electrically connected with the semiconductor device. The metal patterns are in the dielectric layer and over the non-device region of the substrate, in which the metal patterns are electrically isolated from the semiconductor device. The heat dissipation structure is over the non-device region of the substrate and extending through at least two of the metallization layers, in which the heat dissipation structure is in contact with the metal patterns of one of the metallization layers.Type: ApplicationFiled: July 27, 2023Publication date: January 30, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Yuan LEE, Chih-Kai YANG, Ken-Hsien HSIEH, Ya Hui CHANG
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Publication number: 20230409133Abstract: A projection device including a casing, an operation module, a main board, and a conducting element is provided. The operation module includes an operation element and an operation circuit board. The operation element is disposed on the casing to execute a first operation. The operation circuit board is coupled to the operation element. The operation circuit board includes a wireless signal emitter and a first conducting portion. The operation circuit board generates a first operation signal in response to the first operation, and the wireless signal emitter emits the first operation signal. The main board includes a wireless signal receiver and a second conducting portion. The wireless signal receiver is configured to receive the first operation signal, and the main board is configured to execute a first action corresponding to the first operation signal. The conducting element is electrically connected to the first conducting portion and the second conducting portion.Type: ApplicationFiled: June 17, 2023Publication date: December 21, 2023Applicant: Coretronic CorporationInventors: Chih-Hui Chang, Jeng-An Liao
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Patent number: 11662652Abstract: A projector, including a body, a light source, a light valve, a projection lens, and a lens adjustment module, is provided. The light source and the light valve are disposed in the body, and the projection lens is movably disposed on the body. The lens adjustment module includes a driven structure connected to the projection lens, a guiding member and a rotating member connected to the guiding member. The guiding member is disposed on the body to be rotatable along an axis of rotation and has a closed ring guiding rail. The driven structure is slidably disposed at the closed ring guiding rail and is configured to move relative to the guiding member along a closed ring path defined by the closed ring guiding rail. A normal direction of a surface where the closed ring path is located is not parallel to the axis of rotation.Type: GrantFiled: April 19, 2021Date of Patent: May 30, 2023Assignee: Coretronic CorporationInventors: Chun-Hsien Wu, Chih-Hui Chang, Fu-Shun Kao
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Publication number: 20230152676Abstract: A focusing module includes a focusing ring and a projection lens mounting ring. The focusing ring has a first ring body and a first annular wall with a limiting hole. The projection lens mounting ring has a second annular wall which can rotate relative to the first annular wall along a circumferential direction of the first annular wall. The second annular wall has a through hole and a rotation buffer structure having a limiting portion and a cantilever portion. The limiting portion has a center surrounded by the hole edge and protruding toward the first annular wall. The center has first side and second side. A thickness of the limiting portion decreases from the center toward the first and second side. The center is in the limiting hole and the first annular wall is pressed against the first and second side when the limiting portion contacts against the limiting hole.Type: ApplicationFiled: November 15, 2022Publication date: May 18, 2023Inventor: CHIH-HUI CHANG
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Publication number: 20210397073Abstract: A projector, including a body, a light source, a light valve, a projection lens, and a lens adjustment module, is provided. The light source and the light valve are disposed in the body, and the projection lens is movably disposed on the body. The lens adjustment module includes a driven structure connected to the projection lens, a guiding member and a rotating member connected to the guiding member. The guiding member is disposed on the body to be rotatable along an axis of rotation and has a closed ring guiding rail. The driven structure is slidably disposed at the closed ring guiding rail and is configured to move relative to the guiding member along a closed ring path defined by the closed ring guiding rail. A normal direction of a surface where the closed ring path is located is not parallel to the axis of rotation.Type: ApplicationFiled: April 19, 2021Publication date: December 23, 2021Applicant: Coretronic CorporationInventors: Chun-Hsien Wu, Chih-Hui Chang, Fu-Shun Kao
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Patent number: 11054729Abstract: A projector includes an optical engine module, a projection lens module, a heat dissipation module, and a laser module. The laser module includes a positioning member and a laser unit fixed to the positioning member, wherein a positioning member includes a main plate portion and two shoulder portions, the main plate portion includes a first upper surface and a first lower surface opposite to each other, a first front surface and a first rear surface opposite to each other, and a first left side surface and a first right side surface opposite to each other, and the two shoulder portions extend on a plane of the first upper surface from the first left side surface and the first right side surface of the main plate portion, respectively. A laser module is also provided.Type: GrantFiled: September 24, 2019Date of Patent: July 6, 2021Assignee: Coretronic CorporationInventors: Chun-Hsien Wu, Kuei-Ju Weng, Chih-Hui Chang, Yu-Chang Chang, Fu-Shun Kao
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Publication number: 20200096852Abstract: A projector includes an optical engine module, a projection lens module, a heat dissipation module, and a laser module. The laser module includes a positioning member and a laser unit fixed to the positioning member, wherein a positioning member includes a main plate portion and two shoulder portions, the main plate portion includes a first upper surface and a first lower surface opposite to each other, a first front surface and a first rear surface opposite to each other, and a first left side surface and a first right side surface opposite to each other, and the two shoulder portions extend on a plane of the first upper surface from the first left side surface and the first right side surface of the main board portion, respectively. A laser module is also provided.Type: ApplicationFiled: September 24, 2019Publication date: March 26, 2020Inventors: CHUN-HSIEN WU, KUEI-JU WENG, CHIH-HUI CHANG, YU-CHANG CHANG, FU-SHUN KAO
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Patent number: 9305276Abstract: Various embodiments include computer-implemented methods of modeling production for a semiconductor foundry. One method includes: obtaining a multi-part order including: a first order for a fixed number of preliminary products; and a second order for a fixed number of completed products formed from the fixed number of preliminary products; and determining an amount of inventory required to fulfill the first order and the second order, wherein the determining includes: creating a first model including a first inventory amount required to meet the first order; and creating a second model including a second inventory amount required to meet the second order, wherein the second model accounts for results from the first model, including the first inventory amount; and running a single linear programming (LP) process using the first model and the second model to determine the amount of inventory required to fulfill the first order.Type: GrantFiled: January 4, 2013Date of Patent: April 5, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Chih-Hui Chang, Rahul Nahar
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Patent number: 9151955Abstract: The invention provides a projection system and a light-homogenizing device adjustment element for adjusting the position of a light-homogenizing device. The light-homogenizing device adjustment element has an actuator, and the actuator leans against one side of the light-homogenizing device and has a plurality of curved surfaces with different radii of curvature. When the actuator rotates, different curved surfaces push the light-homogenizing device to cause the light-homogenizing device to move in at least one direction from an initial position.Type: GrantFiled: December 26, 2013Date of Patent: October 6, 2015Assignee: CORETRONIC CORPORATIONInventors: Sheng-Yu Chiu, Chih-Hui Chang
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Publication number: 20150185594Abstract: A dustproof cover used in a projector has a casing and a projection lens, the projection lens is disposed at a front side of the casing, the projection lens has a first adjusting device disposed at a top side of the casing connected to front side. The dustproof cover includes a body, a lid, a transparent plate and at least one airtight trim, in which the body is assembled to the casing to cover the projection lens and the first adjusting device and has a first adjusting hole to expose the first adjusting device. The lid is detachably connected to the body to conceal the first adjusting hole. The transparent plate is disposed on the body to allow an image beam emitted from the projection lens passing through. The at least one airtight trim is connected to a portion of the casing contacted the body.Type: ApplicationFiled: September 2, 2014Publication date: July 2, 2015Applicant: CORETRONIC CORPORATIONInventors: Jung-Chi Chen, Sheng-Yu Chiu, Chih-Hui Chang, Hsiu-Min Hsiao
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Patent number: 8833973Abstract: A lamp position adjustment device includes a base plate, a supporting frame, a lamp holder, a first positioning mechanism, and a second positioning mechanism. The first positioning mechanism is disposed between the lamp holder and the supporting frame and between the lamp holder and the base plate to enable the lamp holder to move in a first direction relative to the supporting frame. The first direction is substantially parallel with one side of a light incident surface of an integration rod. The second positioning mechanism is disposed between the lamp holder and the base plate to enable the lamp holder to rotate about an axis parallel to the first direction.Type: GrantFiled: October 15, 2009Date of Patent: September 16, 2014Assignee: Coretronic CorporationInventors: Jung-Chi Chen, Jih-Ching Chang, Chih-Hui Chang
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Publication number: 20140195029Abstract: Various embodiments include computer-implemented methods of modeling production for a semiconductor foundry. One method includes: obtaining a multi-part order including: a first order for a fixed number of preliminary products; and a second order for a fixed number of completed products formed from the fixed number of preliminary products; and determining an amount of inventory required to fulfill the first order and the second order, wherein the determining includes: creating a first model including a first inventory amount required to meet the first order; and creating a second model including a second inventory amount required to meet the second order, wherein the second model accounts for results from the first model, including the first inventory amount; and running a single linear programming (LP) process using the first model and the second model to determine the amount of inventory required to fulfill the first order.Type: ApplicationFiled: January 4, 2013Publication date: July 10, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chih-Hui Chang, Rahul Nahar