Patents by Inventor Chih-Hung Huang
Chih-Hung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11835441Abstract: A sample classification device including a carrier, a first detection module, and a sample pipeline is provided. The first detection module includes a first light-emitting device, a second light-emitting device, and a first optical sensing device. The first light emitting device is located on the carrier and used to emit light of a first wavelength. The second light emitting device is located on the carrier and used to emit light of a second wavelength. The first wavelength is different from the second wavelength. The first optical sensing device is located on the carrier and between the first light emitting device and the second light emitting device. The sample pipeline is located above the carrier and passes above the first optical sensing device.Type: GrantFiled: May 5, 2021Date of Patent: December 5, 2023Assignee: Industrial Technology Research InstituteInventors: Chih-Hung Huang, Yuan-Fa Lee, Miao-Chang Wu, Sheng-Li Chang, Chih-Ching Liao
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Publication number: 20230387092Abstract: A semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, at least one first electronic component embedded in the substrate, and a first circuit layer disposed on the substrate and electrically connected to the first electronic component. The first circuit layer includes a conductive wiring pattern. The stress buffering layer is disposed on the substrate. The conductive wiring pattern of the first circuit layer extends through the stress buffering layer. The second conductive structure is disposed on the stress buffering layer and the first circuit layer.Type: ApplicationFiled: August 8, 2023Publication date: November 30, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chien-Mei HUANG, Shih-Yu WANG, I-Ting LIN, Wen Hung HUANG, Yuh-Shan SU, Chih-Cheng LEE, Hsing Kuo TIEN
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Patent number: 11828446Abstract: A winding mechanism includes a housing, an inner cylinder and a wire. The housing is formed with an accommodating space therein. An inner surface of the housing is formed with an internal thread structure. The inner cylinder is disposed in the accommodating space and defines a central axis. An outer surface of the inner cylinder is formed with an external thread structure. The external thread structure is cooperated with the internal thread structure. The inner cylinder is capable of displacing along the central axis by rotating relative to the housing. The external thread structure includes at least two contact portions and at least two non-contact portions, and gaps are formed between the non-contact portions of the external thread structure and the internal thread structure. An end of the wire is connected to the inner cylinder and is wound along the external thread structure of the inner cylinder.Type: GrantFiled: February 1, 2023Date of Patent: November 28, 2023Assignee: Radiant Opto-Electronics CorporationInventors: Chung-Kuang Chen, Guo-Hao Huang, Chih-Hung Ju, Cheng-Ang Chang
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Publication number: 20230378314Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.Type: ApplicationFiled: July 13, 2023Publication date: November 23, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
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Patent number: 11820607Abstract: In certain embodiments, a system includes: a source lane configured to move a first die container between a load port and a source lane staging area; an inspection sensor configured to produce a sensor result based on a die on the first die container; a pass target lane configured to move a second die container between a pass target lane out port and a pass target lane staging area; a fail target lane configured to move a third die container between a fail target lane out port and a fail target lane staging area; and a conveyor configured to move the die from the first die container at the source lane staging area to either the second die container at the pass target lane staging area or the fail target lane staging area based on the sensor result.Type: GrantFiled: August 9, 2022Date of Patent: November 21, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Sheng Kuo, Chih-Hung Huang, Yi-Fam Shiu, Chueng-Jen Wang, Hsuan Lee, Jiun-Rong Pai
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Patent number: 11819420Abstract: The disclosure relates to a spinal intervertebral body fusion device including an adjustable spacer, a first and second pushing piece, and an operative piece. The adjustable spacer includes a first and second supporting plate. The first supporting plate portion is movably installed on the second supporting plate portion. The first and second supporting plate portions form a first and second opening respectively located at two opposite sides of the adjustable spacer. The first pushing piece located at the first opening and is partially clamped by the first and second supporting plate portions. The second pushing piece located at the second opening is partially clamped by the first and second supporting plate portions. The operative piece is movably disposed through the second pushing piece and screwed to the first pushing piece. The operative piece has an annular slot, and the second pushing piece is partially located in the annular slot.Type: GrantFiled: December 23, 2019Date of Patent: November 21, 2023Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Fang-Jie Jang, Pei-I Tsai, Chih-Chieh Huang, De-Yau Lin, Wei-Lun Fan, Yi-Hung Wen, Kuo-Yi Yang, Hsin-Hsin Shen
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Patent number: 11819614Abstract: The present invention discloses a patient interface having an adaptive system, a respiratory mask and a cushion module adapted with the adaptive system. The adaptive system includes a forehead pressure diffusing portion, a cheek buffering portion and a connecting portion. The forehead pressure diffusing portion is disposed in a frame module. The cheek buffering portion is disposed in a cushion module. The connecting portion is positioned between the forehead pressure diffusing portion and the cheek buffering portion. The connecting portion is configured to transmit pressure between the forehead pressure diffusing portion and the cheek buffering portion. Thus, when a user wears a mask or other devices with the adaptive system, a force received by the face of the user could be automatically and appropriately distributed, further improving comfort of the wearer.Type: GrantFiled: June 26, 2019Date of Patent: November 21, 2023Assignee: APEX MEDICAL CORPInventors: Chun-hung Chen, Chih-tsan Chien, Pi-kai Lee, Yu-chen Liu, Chia-wei Huang, Shin-Lan Lin
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Publication number: 20230369448Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.Type: ApplicationFiled: July 13, 2023Publication date: November 16, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Bo-Rong Chen, Che-Hung Huang, Chun-Ming Chang, Yi-Shan Hsu, Chih-Tung Yeh, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
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Publication number: 20230369054Abstract: A semiconductor structure includes a semiconductor fin extending from a substrate, a source/drain (S/D) feature disposed over the semiconductor fin, a silicide layer disposed over the S/D feature, where the silicide layer extends along a sidewall of the S/D feature, and an etch-stop layer (ESL) disposed along a sidewall of the silicide layer.Type: ApplicationFiled: July 25, 2023Publication date: November 16, 2023Inventors: Chun-Hsiung Lin, Shih-Cheng Chen, Chih-Hao Wang, Jung-Hung Chang, Jui-Chien Huang
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Publication number: 20230360939Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.Type: ApplicationFiled: July 14, 2023Publication date: November 9, 2023Inventors: Tsung-Sheng KUO, Guan-Wei HUANG, Chih-Hung HUANG, Yang-Ann CHU, Hsu-Shui LIU, Jiun-Rong PAI
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Publication number: 20230363134Abstract: A static random access memory (SRAM) cell includes a first gate and a second gate each extending in a first direction. A first gap separates the first gate from the second gate in the first direction. The SRAM cell includes a Vcc contact extending in the first direction. A second gap separates the Vcc contact and the first gate in a second direction perpendicular to the first direction. No segment of the Vcc contact overlaps with the first gap in the first direction. The SRAM cell includes a Vss contact extending in the first direction. A third gap separates the Vss contact from the first gate in the second direction. A segment of the Vss contact is disposed to the first gap. The Vss contact is smaller than the Vcc contact in the second direction.Type: ApplicationFiled: July 20, 2023Publication date: November 9, 2023Inventors: Shih-Han Huang, Chih-Hung Hsieh
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Publication number: 20230361091Abstract: An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.Type: ApplicationFiled: July 11, 2023Publication date: November 9, 2023Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Wei-Jhen Chen, Chih-Hsun Hsu, Yuan-Hung Hsu, Chih-Nan Lin, Chang-Fu Lin, Don-Son Jiang, Chih-Ming Huang, Yi-Hsin Chen
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Publication number: 20230343911Abstract: A packaging structure, which includes a metal bracket, a driver chip, a light-emitting component, a packaging member and a metal cover plate. The metal bracket includes a plurality of pins, and first and second surfaces oppositely disposed. The driver chip is disposed on the first surface, and configured to control a light-emitting state of the light-emitting component. The light-emitting component is disposed on the second surface and electrically connected to the driver chip through the metal bracket. The packaging structure is disposed on the metal bracket, and configured to fix the metal bracket and enclose the driver chip and the light-emitting component. The pins are disposed surrounding the driver chip and are partially exposed from the packaging member. The metal cover plate is disposed on a side of the driver chip away from the light-emitting component, covering an entire surface of the driver chip.Type: ApplicationFiled: October 19, 2022Publication date: October 26, 2023Applicant: BRIGHTEK OPTOELECTRONICS CO., LTD. (Jiangsu)Inventors: Feng WU, Chih-Hung TZENG, Chien-Chung HUANG
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Publication number: 20230335622Abstract: A method for fabricating semiconductor device includes the steps of: forming fin-shaped structures on a substrate; using isopropyl alcohol (IPA) to perform a rinse process; performing a baking process; and forming a gate oxide layer on the fin-shaped structures. Preferably, a duration of the rinse process is between 15 seconds to 60 seconds, a temperature of the baking process is between 50° C. to 100° C., and a duration of the baking process is between 5 seconds to 120 seconds.Type: ApplicationFiled: June 26, 2023Publication date: October 19, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Po-Chang Lin, Bo-Han Huang, Chih-Chung Chen, Chun-Hsien Lin, Shih-Hung Tsai, Po-Kuang Hsieh
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Publication number: 20230335424Abstract: A multiple transport carrier docking device may be capable of storing and/or staging a plurality of transport carriers in a chamber of the multiple transport carrier docking device, and may be capable of forming an air-tight seal around a transport carrier in the chamber. Semiconductor wafers in the transport carrier may be accessed by a wafer transport tool while the air-tight seal around the transport carrier prevents and/or reduces the likelihood that contaminants in the semiconductor fabrication facility will reach the semiconductor wafers. The air-tight seal around the transport carrier may reduce defects of the semiconductor wafers that might otherwise be caused by the contaminants, may increase manufacturing yield and quality in the semiconductor fabrication facility, and/or may permit the continued reduction in device and/or feature sizes of integrated circuits and/or semiconductor devices that are to be formed on semiconductor wafers.Type: ApplicationFiled: May 15, 2023Publication date: October 19, 2023Inventors: Chih-Hung HUANG, Cheng-Lung WU, Yang-Ann CHU, Hsuan LEE, Jiun-Rong PAI
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Publication number: 20230335614Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a second barrier layer on the first barrier layer; forming a first hard mask on the second barrier layer; removing the first hard mask and the second barrier layer to form a recess; and forming a p-type semiconductor layer in the recess.Type: ApplicationFiled: June 28, 2023Publication date: October 19, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou, Chih-Tung Yeh
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Patent number: 11792969Abstract: A static random access memory (SRAM) cell includes a first gate and a second gate each extending in a first direction. A first gap separates the first gate from the second gate in the first direction. The SRAM cell includes a Vcc contact extending in the first direction. A second gap separates the Vcc contact and the first gate in a second direction perpendicular to the first direction. No segment of the Vcc contact overlaps with the first gap in the first direction. The SRAM cell includes a Vss contact extending in the first direction. A third gap separates the Vss contact from the first gate in the second direction. A segment of the Vss contact is disposed to the first gap. The Vss contact is smaller than the Vcc contact in the second direction.Type: GrantFiled: July 26, 2018Date of Patent: October 17, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Han Huang, Chih-Hung Hsieh
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Publication number: 20230317651Abstract: Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method includes depositing a first dielectric layer over a metal pad disposed over a workpiece, forming a first opening in the first dielectric layer to expose a portion of the metal pad, after the forming of the first opening, forming a second dielectric layer over the exposed portion of the metal pad, depositing a first polymeric material over the second dielectric layer, forming a second opening through the first polymeric material and the second dielectric layer to expose the metal pad, and forming a bump feature over the exposed metal pad.Type: ApplicationFiled: June 5, 2023Publication date: October 5, 2023Inventors: Chih-Fan Huang, Yen-Ming Chen, Chih-Sheng Li, Hui-Chi Chen, Chih-Hung Lu, Dian-Hau Chen
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Publication number: 20230307785Abstract: A method for manufacturing a porous membrane suitable for use as a separator of a lithium ion battery, comprising the following steps: 1) compounding a polymer and hydrophobic filler by dry mixing; 2) extruding the compounded mixture to obtain a cast film and 3) stretching the cast film to obtain the porous membrane. A porous membrane suitable for use as a separator of a lithium ion battery, a separator for a lithium ion battery, a lithium ion battery, and a device are also provided.Type: ApplicationFiled: July 5, 2021Publication date: September 28, 2023Applicant: EVONIK OPERATIONS GMBHInventors: Yuan-Chang HUANG, Daniel ESKEN, Uwe KINZLINGER, Gerold SCHMIDT, Guido SCHARF, Chih-Hung LEE, Hung-Chun WU, Yu-Han LIN, Ting-Fang LIN
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Publication number: 20230302589Abstract: The present disclosure relates to systems and methods for affixing and/or removing a fastener from a wafer-carrying pod. The system includes a robotic arm with a screw tool assembly disposed at the far end of the robotic arm. The screw tool assembly includes a lower sleeve configured to receive a fastener. A screwdriver is disposed within an upper sleeve of the screw tool assembly, and a motor is provided to rotate the screwdriver. In use, the screw tool assembly is positioned over the fastener so the lower sleeve surrounds the fastener and the screwdriver engages the fastener. The screwdriver unscrews the fastener from the pod, and the fastener head is received within the lower sleeve.Type: ApplicationFiled: May 19, 2023Publication date: September 28, 2023Inventors: Yu-Chen Chen, Chih-Hung Huang, Cheng-Lung Wu, Yang-Ann Chu, Jiun-Rong Pai