Abstract: A method for stabilizing a degas temperature of wafers in a degas chamber comprises (a) setting an electrical heater at an initial output power, (b) heating each wafer for a first period of time to keep the temperature of the wafer at a predetermined range by setting the electrical heater at a first output power equal to or higher than the initial output power, (c) heating the wafer for a second period of time to increase the temperature of the wafer to a predetermined value by raising the output power of the electrical heater to a second output power; and (d) heating the wafer for a third period of time by reducing the output power of the electrical heater to a third output power. The method lessens the “first wafer effect” and the “temperature-accumulated effect”. Therefore, the temperature of the wafers can be well controlled before a subsequent sputtering process.

Abstract: The invention provides a method for forming a dielectric layer in a semiconductor device by using etch stop layers, and a semiconductor structure formed by the method. The method in accordance with the invention comprises: providing a semiconductor substrate having raised portions and recessed portions; forming a first etch stop layer covering the raised portions and the recessed portions; forming a dielectric layer covering an upper surface of the first etch stop layer, wherein the dielectric layer has a thickness substantially smaller than that of each of the raised portions; forming a second etch stop layer covering the dielectric layer; and performing a planarizing step for polishing the second etch stop layer and the dielectric layer until exposing the first etch stop layer on an upper surface of the raised portions, and remaining a plurality of remaining portions of the second etch stop layer on the planarized surface, and remaining the dielectric layer between raised portions.

Abstract: The invention provides a method for forming a dielectric layer in a semiconductor device by using etch stop layers, and a semiconductor structure formed by the method. The method in accordance with the invention comprises: providing a semiconductor substrate having raised portions and recessed portions; forming a first etch stop layer covering the raised portions and the recessed portions; forming a dielectric layer covering an upper surface of the first etch stop layer, wherein the dielectric layer has a thickness substantially smaller than that of each of the raised portions; forming a second etch stop layer covering the dielectric layer; and performing a planarizing step for polishing the second etch stop layer and the dielectric layer until exposing the first etch stop layer on an upper surface of the raised portions, and remaining a plurality of remaining portions of the second etch stop layer on the planarized surface, and remaining the dielectric layer between raised portions.