Abstract: A display unit is provided. The display unit includes a multiplexer circuit, a latch circuit, and a liquid crystal capacitor. The multiplexer circuit receives a plurality of voltages. The plurality of voltages at least comprises a first voltage and a second voltage. The latch circuit receives a driving signal and a first data signal. When the driving signal is at an asserted state, the latch circuit controls the multiplexer circuit according to the first data signal to select the first voltage or the second voltage to serve as a display voltage. The liquid crystal capacitor receives the display voltage. The liquid crystal capacitor has a plurality of liquid crystal molecules, and an optical state of the plurality of liquid crystal molecules is determined according to the display voltage.

Abstract: A voltage generator includes a controllable voltage divider, a pull-up circuit and a first pull-down circuit. The controllable voltage divider is utilized for generating an output voltage at an output node of the controllable voltage divider according to a first reference voltage, a second reference voltage, and a control signal, wherein the second reference voltage is lower than the first reference voltage. The pull-up circuit is coupled to the output node of the controllable voltage divider and the first reference voltage, and is utilized for selectively connecting the first reference voltage to the output node of the controllable voltage divider. The first pull-down circuit is coupled to the output node of the controllable voltage divider and the second reference voltage, and is utilized for selectively connecting the second reference voltage to the output node of the controllable voltage divider.

Abstract: A driving method of multi-stable display is provided. A first voltage is provided to a scan line of a pixel if a state of the pixel is not changed. If the pixel is set to a bright state, voltages V2 and V4 are provided to the scan line and a data line in a first phase, and voltages V3 and V5 are provided to the scan and the data lines in a second phase. |V2?V4| and |V3?V5| are smaller than a first threshold voltage. If the pixel is set to a dark state, voltages V2 and V5 are provided to the scan and the data lines in the first phase, and voltages V3 and V4 are provided to the scan and the data lines in the second phase. |V2?V5| and |V3?V4| are greater than a second threshold voltage, and the second threshold voltage is greater than the first threshold voltage.

Abstract: A bi-stable active matrix (AM) display apparatus and a method for driving a display panel thereof are provided. The bi-stable AM display apparatus includes a bi-stable AM display panel, a scan driver, a data driver and a controller. A frame period is divided into a resetting phase and a determining phase. The controller resets pixels on a plurality of scan lines of the bi-stable AM display panel to a homotropic state in the resetting phase through the scan driver and the data driver. The controller writes frame information into the pixels on the scan lines in the determining phase through the scan driver and the data driver.

Abstract: A junction box for a solar module is disclosed and comprises a housing having an opening for introducing a plurality of conductor strips; and an electrical connection mechanism disposed in a receptacle of the housing. The electrical connection mechanism comprises a plurality of conductor strip connection devices disposed on an inner surface of the housing for connecting to the conductor strips; and a current-path arrangement module detachably connected with the conductor strip connection devices and comprising a carrier, a plurality of electricity conveying elements and a plurality of electronic components, wherein the electricity conveying elements and the electronic components are disposed on one surface of the carrier, and each electronic component is connected with two adjacent electricity conveying elements.

Abstract: The disclosure provides an operating method for an active-matrix bistable liquid crystal display (LCD) in which each frame of the LCD is refreshed during a single frame time. The method includes the steps of: driving an external charge voltage to a row of pixels of the LCD; removing the external charge voltage from the row of pixels, and then the row of pixels being driven by an internal storage-capacitor voltage of the row of pixels in the following first time interval; driving an external recharge voltage to the row of pixels; removing the external recharge voltage from the row of pixels, and then the row of pixels being driven by an internal storage-capacitor voltage of the row of pixels in the following second time interval; and driving an external discharge voltage to the row of pixels.

Abstract: This invention provides a color passive matrix bistable liquid crystal display system, in which one respective scan line corresponds to sub-pixels of same color and neighboring scan lines correspond to sub-pixels of different colors. The scan lines are grouped in accordance with the colors of the sub-pixels corresponding thereto such that different scan driving voltages can be provided to the sub-pixels of different colors when the scan lines are scanned. By way of the arrangement of the sub-pixels, different scan driving voltages are switched to the respective scan lines in accordance with the colors of the sub-pixels corresponding thereto. As a result, a demand that the sub-pixels of different colors require different scan driving voltages is satisfied. The image quality is improved.

Abstract: A method for making an optical device includes the steps of: rubbing an orienting film so as to stretch the molecular structure thereof and so as to permit the molecular units of the molecular structure to be aligned along a first axis and to permit the orienting space between each adjacent pair of the molecular units of the molecular structure to be oriented in a direction parallel to a second axis; and forming an optical anisotropical layer on the orienting film by applying a liquid crystal film of rod-like molecules on the orienting film which orients the rod-like molecules by virtue of spatial effect of the molecular units and the orienting spaces.

Abstract: A driving device of a passive matrix (PM) bistable display and a real-time touch input display method thereof are provided. The real-time touch input display method includes following steps. First, a touch event of a touch panel is detected to obtain a touch coordinate. When the touch event occurs, one of a plurality of scan lines of the PM bistable display is selected as a corresponding scan line according to the touch coordinate, and a corresponding pixel on the corresponding scan line is driven according to the touch coordinate.

Abstract: A power-on management circuit for a memory device is provided. The power-on management circuit comprises a first external power-on voltage detector, a second external power-on voltage detector, a delay unit, a logic circuit, an internal power-on voltage detector, a voltage control circuit, a plurality of first electric pumps and a second electric pump. The first external power-on voltage detector has a first voltage threshold, receives a first external voltage, and generates a first control signal when the first external voltage is higher than the first voltage threshold. The second external power-on voltage detector has a second voltage threshold, receives a second external voltage, and generates a second control signal when the second external voltage is higher than the second voltage threshold.

Abstract: A signal delaying system is provided, including a delay locked loop circuit and a voltage providing circuit. The delay locked loop circuit delays an input signal to generate a delayed signal. The voltage providing circuit provides a control voltage to the delay locked loop circuit for determining a delay time of the delay locked loop circuit when the delay locked loop circuit operates in a first mode; and providing a stand-by voltage to the delay locked loop circuit when the delay locked loop circuit operates in a second mode, wherein the voltage providing circuit further adjusts the stand-by voltage to make the stand-by voltage substantially equal to the control voltage.

Abstract: A signal delaying system is provided, including a delay locked loop circuit and a voltage providing circuit. The delay locked loop circuit delays an input signal to generate a delayed signal. The voltage providing circuit provides a control voltage to the delay locked loop circuit for determining a delay time of the delay locked loop circuit when the delay locked loop circuit operates in a first mode; and providing a stand-by voltage to the delay locked loop circuit when the delay locked loop circuit operates in a second mode, wherein the voltage providing circuit further adjusts the stand-by voltage to make the stand-by voltage substantially equal to the control voltage.

Abstract: A power-on management circuit for a memory device is provided. The power-on management circuit comprises a first external power-on voltage detector, a second external power-on voltage detector, a delay unit, a logic circuit, an internal power-on voltage detector, a voltage control circuit, a plurality of first electric pumps and a second electric pump. The first external power-on voltage detector has a first voltage threshold, receives a first external voltage, and generates a first control signal when the first external voltage is higher than the first voltage threshold. The second external power-on voltage detector has a second voltage threshold, receives a second external voltage, and generates a second control signal when the second external voltage is higher than the second voltage threshold.

Abstract: A wordline driver for DRAM comprises a multiplexer, an inverter and a transistor switch. One end of the multiplexer is connected to a wordline charging voltage, and the other end is connected to an external voltage, wherein the external voltage is less than the wordline charging voltage, and initially the external voltage is outputted. The output end of the inverter is connected to the select line of the multiplexer, and the input end thereof is electrically connected to the output end of the multiplexer. One end of the transistor switch is connected to the input end of the inverter, and the other end thereof is connected to the word line.

Abstract: A voltage providing circuit includes: a first voltage providing circuit, for generating a first voltage; a switch device, for receiving a first voltage; a second voltage providing circuit, for providing a second voltage; a control circuit, for controlling the switch device and the second voltage providing circuit, wherein in a first mode, the control circuit turns off the switch device for allowing a target device to receive the second voltage, and in a second mode, the control circuit turns on the switch device and stops the second voltage providing circuit from providing the second voltage such that the target device can receive the first voltage; and an adjusting circuit, for providing a reference voltage to the first voltage providing circuit according to the first voltage and the second voltage for changing the first voltage, thereby making the first voltage substantially equal to the second voltage.

Abstract: A voltage providing circuit includes: a first voltage providing circuit, for generating a first voltage; a switch device, for receiving a first voltage; a second voltage providing circuit, for providing a second voltage; a control circuit, for controlling the switch device and the second voltage providing circuit, wherein in a first mode, the control circuit turns off the switch device for allowing a target device to receive the second voltage, and in a second mode, the control circuit turns on the switch device and stops the second voltage providing circuit from providing the second voltage such that the target device can receive the first voltage; and an adjusting circuit, for providing a reference voltage to the first voltage providing circuit according to the first voltage and the second voltage for changing the first voltage, thereby making the first voltage substantially equal to the second voltage.

Abstract: A system is configured to drive a display device having a number of cholesteric liquid crystal (CHLC) pixels. The system comprises a processor configured to receive a first set of gray levels for a first image frame and a second set of gray levels for a second image frame, wherein the first set of gray levels is related to a first intensity state of each of the CHLC pixels in the first image frame and the second set of gray levels is related to a second intensity state of each of the CHLC pixels in the second image frame, and a look-up table (LUT) configured to output a third set of gray levels based on the first set of gray levels and the second set of gray levels, wherein the third set of gray levels is related to an addressing voltage to be written to each of the CHLC pixels so as to change each of the CHLC pixels from the first intensity state to the second intensity state.

Abstract: A voltage booster and a memory structure using the same are provided. When a data storage unit in the memory structure is in normal operation, all voltage pumps in the voltage booster are turned on for boosting a supply voltage. However, when the data storage unit is in standby state, in the voltage booster, some voltage pumps are turned on while other voltage pumps are turned off, for boosting the supply voltage. Accordingly, the standby current and power consumption are reduced and the pump efficiency is improved.

Abstract: A display including a scan driver, a data driver, a first pixel, and a second pixel is disclosed. The scan driver provides a first scan signal and a second scan signal. The data driver provides a data signal. The first pixel receives the first scan signal and displays a first color. The second pixel receives the second scan signal and displays a second color. The frequency of the first scan signal and the frequency of the second scan signal relate to the first color and the second color.

Abstract: Systems, methodologies, media, and other embodiments associated with validating a bus are described. One exemplary system embodiment includes an integrated circuit operably connectable to a bus, the bus being connectable to an external device configured to drive one or more electrical signals onto the bus. The integrated circuit may comprise a first logic configured to receive a test sequence of electrical signals from the bus, a second logic configured to produce a check sequence of electrical signals related to the test sequence of electrical signals, and a compare logic operably connected to the first logic and the second logic. The compare logic may be configured to determine whether the bus is correctly transmitting data based, at least in part, on comparing the test sequence and the check sequence.