Abstract: An amplifier device capable of reducing offset voltage includes an offset-voltage cancellation device, an input stage circuit, an output stage circuit, a pseudo output stage circuit, a switch circuit, and an output end. The switch circuit is coupled to the input stage circuit, the output stage circuit, and the pseudo output stage circuit, and is utilized for transmitting an amplified signal provided by the input stage circuit to the output stage circuit and transmitting a first feedback voltage provided by the output stage circuit to the input stage circuit or transmitting the amplified signal provided by the input stage circuit to the pseudo output stage circuit and transmitting a second feedback voltage provided by the pseudo output stage circuit to the input stage circuit according to an operating mode.

Abstract: A dynamic biasing amplifier apparatus, and dynamic biasing apparatus, and method are disclosed. The dynamic biasing amplifier apparatus includes a comparator unit, a dynamic bias generator unit, and an amplifier unit. The amplifier unit receives an input signal and output an output signal based on at least a bias voltage. The comparator unit compares the positive and negative input signals of the amplifier unit. The dynamic bias generator unit generates and adjusts the bias voltage in accordance with the comparing result of the comparator unit. Therefore, the dynamic bias generator unit controls the amplifier unit to operate in a low static current mode when the input signal is in steady state; and the dynamic bias generator unit controls the amplifier unit to operate in a high dynamic current mode when the input signal is in transition state.

Abstract: A charge pump circuit including a plurality of switches and a switch control circuit is provided. The charge pump circuit is suitable for a display panel. The switches switch from “off” state to “on” state in an enable transition, and switch from “on” state to “off” state in a disable transition. The switch control circuit is coupled to the switches for controlling the on/off states of the switches and allowing the charge pump circuit to provide an output voltage that is different from an input voltage. The switch control circuit prolongs the time required for enable transition of the switches to be longer than the time for disable transition thereof. The equivalent impedances of the switches change from high values to low values when the switches are at the enable transition.

Abstract: An operational amplifier capable of compensating offset voltage includes an input stage circuit having a positive input end, a negative input end, a first current output end, and a second current output end, for outputting current corresponding to voltage received by the positive and negative input ends, an output stage circuit coupled to the first current output end and the second current output end of the input stage circuit, for outputting voltage according to current outputted from the first current output end and the second current output end, and an trimming device coupled between the input stage circuit and the output stage circuit, for adjusting current of the first current output end or the second current output end for compensating offset voltage.

Abstract: An analog source driving apparatus including an operational amplifier, a first resistor, a second resistor, a variable gain unit and a source driver is provided. A constant gain amplifier is composed with the operational amplifier, the first resistor, and the second resistor, wherein the first resistor is coupled between the inverse input terminal of the operational amplifier and the ground, and the second resistor is coupled between the inverse input terminal and the output terminal of the operational amplifier. The variable gain unit is coupled to an analog signal and the non-inverse input terminal of the operational amplifier for adjusting the analog signal to avoid affecting the zero point position and pole position of the system. Accordingly, the analog source driving apparatus can provide a stable driving output.

Abstract: A sample-and-hold apparatus and an operating method thereof are provided. The sample-and-hold apparatus includes a sampling amplifier, a transistor, a first switch, a second switch, a sampling capacitor, and a drain-charge unit. A first input terminal of the sampling amplifier receives an input signal. A first-terminal of the transistor is coupled to a first voltage. The first switch is coupled between an output terminal of the sampling amplifier and a gate of the transistor. The first and second terminals of the second switch are coupled to a second terminal of the transistor and a second input terminal of the sampling amplifier, respectively. The first and second terminals of the sampling capacitor are coupled to the gate of the transistor and a reference voltage. The drain-charge unit for draining/providing charges has first and second terminals coupled to the second terminal of the second switch and a second voltage, respectively.

Abstract: A voltage-controlled current source (VCCS) is provided. The VCCS controls an output current according to a controlling voltage. The VCCS includes an operational amplifier (OP-amplifier), a transistor, a resistor and a current mirror. The present invention utilizes the characteristics of the OP-amplifier to compensate for the voltage difference between the gate and the source of the transistor so that the resulting terminal voltage on the resistor is equal to the input control voltage. Therefore, the VCCS of the present invention can reduce the factors including process drift, fluctuation in the DC voltage source or the output current that can affect the terminal voltage difference of the resistor and hence the accuracy of the output current.

Abstract: A sample-and-hold circuit including a first switch, a first capacitor and an amplifier is provided. The switch has a first terminal to receive the input signal and transmit it to a second terminal thereof in the sample period. The first terminal of the first capacitor couples to the second terminal of the first switch, and the second terminal of the first capacitor couples to a first voltage for storing the sampling result of the input signal. The amplifier couples to the second terminal of the first switch, wherein the amplifier is disabled in the sample period, and the amplifier is enabled to generate the output signal according to the sampling result in the hold period.

Abstract: An overdrive digital-to-analog converter (DAC), a source driver, and a method thereof are provided. The DAC comprises a voltage divider unit, a selection unit, a buffer unit, and a detection unit. The voltage divider unit provides a plurality of reference voltages. The detection unit outputs a regulation signal according to a comparison result between a specific reference signal corresponding to an input digital signal and an output voltage output from the buffer unit. The selection unit regulates an overdrive voltage input to the buffer unit according to the regulation signal and the input digital signal. Accordingly, the output voltage of the buffer unit is changed quickly, and the conversion speed of the DAC is improved.

Abstract: A voltage conversion device having non-linear gain and changeable gain polarity includes a switch module, a gain decision module, a first voltage selection module, a second voltage selection module, a first switch unit, a second switch unit and a voltage output module. The switch module is used for outputting analog voltage provided by the analog voltage source or voltage corresponding to the system ground end. The gain decision module is used for determining a gain. The first voltage selection module is used for outputting a first DC voltage. The second voltage selection module is used for outputting a second DC voltage. The first switch unit is used for outputting the first DC voltage. The second switch unit is used for outputting the second DC voltage. The voltage output module is used for outputting an amplified result of a DC voltage according to the gain.

Abstract: A voltage conversion device having non-linear gain and changeable gain polarity includes a switch module, a gain decision module, a first voltage selection module, a second voltage selection module, a first switch unit, a second switch unit and a voltage output module. The switch module is used for outputting analog voltage provided by the analog voltage source or voltage corresponding to the system ground end. The gain decision module is used for determining a gain. The first voltage selection module is used for outputting a first DC voltage. The second voltage selection module is used for outputting a second DC voltage. The first switch unit is used for outputting the first DC voltage. The second switch unit is used for outputting the second DC voltage. The voltage output module is used for outputting an amplified result of a DC voltage according to the gain.

Abstract: A voltage conversion device has a non-linear gain, for converting analog voltage provided by an analog voltage source. The voltage conversion device comprises a gain decision module, a voltage selection module, and a voltage output module. The gain decision module comprises an analog to digital (A/D) converter and a gain selector. The A/D converter is used for converting analog voltage provided by the analog voltage source into digital signals. The gain selector is used for determining a gain. The voltage selection module is used for outputting a direct-current (DC) voltage. The voltage output module has a first input end coupled to the gain selector, an output end coupled to the gain selector, and a second input end coupled to the voltage selection module, for outputting an amplified result of the DC voltage outputted from the voltage selection module.

Abstract: A method for reducing phase lock time and jittering and a phase lock loop (PLL) using the same adapted for PLL including a charge pump (CP) which includes a pull-up and a pull-down networks used for controlling output voltage of the CP. The output voltage is used for controlling frequency and phase of an output signal of the PLL. The method includes: receiving a reference and a feedback signals; setting the driving capabilities of the pull-up and the pull-down networks to a first driving capability when the phase difference between the reference and the feedback signals is greater than a predetermined value; setting the driving capabilities of the pull-up and the pull-down networks to a second driving capability when the phase difference between the reference and the feedback signals is smaller than the predetermined value, wherein the first driving capability is greater than the second driving capability.

Abstract: An overdrive digital-to-analog converter (DAC), a source driver, and a method thereof are provided. The DAC comprises a voltage divider unit, a selection unit, a buffer unit, and a detection unit. The voltage divider unit provides a plurality of reference voltages. The detection unit outputs a regulation signal according to a comparison result between a specific reference signal corresponding to an input digital signal and an output voltage output from the buffer unit. The selection unit regulates an overdrive voltage input to the buffer unit according to the regulation signal and the input digital signal. Accordingly, the output voltage of the buffer unit is changed quickly, and the conversion speed of the DAC is improved.

Abstract: A high accuracy sample and hold circuit including a first switch, a second switch, a first capacitor, a second capacitor and an amplifier is disclosed. The first capacitor receives and saves a sampling voltage from the first switch during a first period, while the second capacitor receives and saves another sampling voltage from the second switch during a second period. The amplifier has first and second positive input terminals, a negative input terminal, an output terminal and a first input stage and an output stage. Wherein, the first input stage includes a first input set and a second input set. During the first period, the amplifier disables the operation of the first input set and enables the operation of the second input set, while during the second period, the amplifier enables the operation of the first input set and disables the operation of the second input set.

Abstract: A digital-to-analog (D/A) conversion device including a data-latch unit, a D/A conversion unit and a gain amplifier is provided. Wherein, the amplitude of the supply voltages for the reference voltage of the D/A conversion unit is not greater than that of the data-latch unit so that the switches in a switch control unit of the D/A conversion unit can be fully turned on or off without using level-shift units. The output amplifier must have a gain to amplify the output signal of the D/A conversion unit to an expected voltage range.

Abstract: A voltage regulator including a voltage regulation unit and an over driving unit is provided. The voltage regulation unit outputs a corresponding output voltage according to an input voltage. The over driving unit is coupled between an input terminal and an output terminal of the voltage regulation unit and regulates the input voltage according to the comparison result between the output voltage and a reference voltage.

Abstract: A driving device with a common driver for driving a plurality of loadings is provided. The driving device includes a first driver and a plurality of first switches. The first driver enhances the driving ability of input data received and outputs the input data. The first terminal of the first switches is electrically connected to the output terminal of the first driver and the second terminal of the first switches is electrically connected to the corresponding loading of the loadings.

Abstract: A driving apparatus for driving a display panel having N data lines is provided. The driving apparatus comprises a driving unit and a switching unit. The driving unit includes N/K output ends, wherein N and K is a positive integer. The driving unit receives data signals and latches the data signals. And, the driving unit converts the data signals into N/K driving signals, and then outputs those driving signals respectively from N/K output ends. The switching unit includes N/K input ends and N output ends. The switching unit selects N/K output ends from the N output ends for outputting data and makes each input end be coupled to one of the corresponding output ends selected. Each of the input ends of the switching unit is respectively coupled to the corresponding output end of the driving unit.

Abstract: A current source apparatus for reducing interference with noise is provided. The current source apparatus includes a controllable current source and a feedback controller. The controllable current source provides an output current according to a control signal and produces a feedback signal according to the output of the controllable current source. The feedback controller is coupled to the controllable current source for receiving the feedback signal, and the feedback controller adjusts the control signal based on the feedback signal and outputs the control signal for controlling the controllable current source to output a stable output current.