Patents by Inventor Chih-Jui Pan
Chih-Jui Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8216891Abstract: Lift-off method and half-tone photolithography are used to fabricate LCD TFT array plate. Only two photo masks are used to respectively define a first and a second metal layers to accomplish the LCD TFT array plate.Type: GrantFiled: September 28, 2010Date of Patent: July 10, 2012Assignee: AU Optronics Corp.Inventors: Yeong-Feng Wang, Liang-Bin Yu, Chih-Jui Pan, Chun-Hao Tung
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Patent number: 8093113Abstract: A liquid crystal display array substrate. A trench is in a substrate. A gate, a gate dielectric layer, a semiconductor layer and a doped semiconductor layer are disposed in the trench, wherein the semiconductor layer comprises a channel. A source electrode and a drain electrode are respectively electrically connected to portions of the semiconductor layer on opposite sides of the channel.Type: GrantFiled: July 7, 2010Date of Patent: January 10, 2012Assignee: AU Optronics Corp.Inventors: Yeong-Feng Wang, Chih-Jui Pan
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Publication number: 20110014738Abstract: Lift-off method and half-tone photolithography are used to fabricate LCD TFT array plate. Only two photo masks are used to respectively define a first and a second metal layers to accomplish the LCD TFT array plate.Type: ApplicationFiled: September 28, 2010Publication date: January 20, 2011Applicant: AU OPTRONICS CORP.Inventors: Yeong-Feng Wang, Liang-Bin Yu, Chih-Jui Pan, Chun-Hao Tung
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Patent number: 7871868Abstract: Lift-off method and half-tone photolithography are used to fabricate LCD TFT array plate. Only two photo masks are used to respectively define a first and a second metal layers to accomplish the LCD TFT array plate.Type: GrantFiled: October 12, 2007Date of Patent: January 18, 2011Assignee: AU Optronics Corp.Inventors: Yeong-Feng Wang, Liang-Bin Yu, Chih-Jui Pan, Chun-Hao Tung
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Patent number: 7864288Abstract: A liquid crystal display (LCD) array substrate and its manufacturing method are provided. Scan lines and data lines of the LCD array substrate are composed of two conductive layers to decrease their RC delay. Moreover, the dielectric layer and even the planarization layer are removed from pixel areas defined by the scan lines and the data lines to increase the light penetration percentage.Type: GrantFiled: May 20, 2010Date of Patent: January 4, 2011Assignee: Au Optronics CorporationInventors: Yeong-Feng Wang, Liang-Bin Yu, Chih-Jui Pan
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Publication number: 20100273285Abstract: A liquid crystal display array substrate. A trench is in a substrate. A gate, a gate dielectric layer, a semiconductor layer and a doped semiconductor layer are disposed in the trench, wherein the semiconductor layer comprises a channel. A source electrode and a drain electrode are respectively electrically connected to portions of the semiconductor layer on opposite sides of the channel.Type: ApplicationFiled: July 7, 2010Publication date: October 28, 2010Applicant: QUANTA DISPLAY INC.Inventors: Yeong-Feng Wang, Chih-Jui Pan
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Publication number: 20100227426Abstract: A liquid crystal display (LCD) array substrate and its manufacturing method are provided. Scan lines and data lines of the LCD array substrate are composed of two conductive layers to decrease their RC delay. Moreover, the dielectric layer and even the planarization layer are removed from pixel areas defined by the scan lines and the data lines to increase the light penetration percentage.Type: ApplicationFiled: May 20, 2010Publication date: September 9, 2010Applicant: AU OPTRONICS CORPORATIONInventors: Yeong-Feng Wang, Liang-Bin Yu, Chih-Jui Pan
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Patent number: 7786479Abstract: A liquid crystal display array substrate. A trench is in a substrate. A gate, a gate dielectric layer, a semiconductor layer and a doped semiconductor layer are disposed in the trench, wherein the semiconductor layer comprises a channel. A source electrode and a drain electrode are respectively electrically connected to portions of the semiconductor layer on opposite sides of the channel.Type: GrantFiled: August 4, 2006Date of Patent: August 31, 2010Assignee: Au Optronics Corp.Inventors: Yeong-Feng Wang, Chih-Jui Pan
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Patent number: 7738072Abstract: A liquid crystal display (LCD) array substrate and its manufacturing method are provided. Scan lines and data lines of the LCD array substrate are composed of two conductive layers to decrease their RC delay. Moreover, the dielectric layer and even the planarization layer are removed from pixel areas defined by the scan lines and the data lines to increase the light penetration percentage.Type: GrantFiled: December 5, 2006Date of Patent: June 15, 2010Assignee: Au Optronics CorporationInventors: Yeong-Feng Wang, Liang-Bin Yu, Chih-Jui Pan
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Patent number: 7646021Abstract: A TFT array substrate includes a substrate, a patterned first metallic layer, a patterned stack layer, a patterned dielectric layer, a patterned transparent conductive layer, and a patterned third metallic layer. Elements of each TFT in the TFT array substrate are arranged vertically, so that the TFT array substrate has relatively small fabrication area and is operable with a high conducting current. Further, the storage capacitance can be enhanced by enclosing or sandwiching the second metallic layer with the common lines and the transparent electrodes. In such a way, pixel flashing caused by those coupled signals can be reduced, thus promoting displaying quality thereof.Type: GrantFiled: March 11, 2009Date of Patent: January 12, 2010Assignee: Au Optronics CorporationInventors: Yeong-Feng Wang, Chih-Jui Pan, Liang-Bin Yu
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Patent number: 7576015Abstract: A method for manufacturing an alignment layer is provided, which includes the following steps. First, a substrate is provided. Next, an auxiliary layer is formed on the substrate. Then, an alignment solution is sprayed on the auxiliary layer through an inkjet printing process. The alignment solution includes an alignment material and a first solvent, and the auxiliary layer has the same polarity as the first solvent. Then, by performing a curing process, the alignment solution is cured to form an alignment layer. As mentioned above, the method for manufacturing an alignment layer may be applied to manufacture an alignment layer with preferred smoothness.Type: GrantFiled: September 20, 2006Date of Patent: August 18, 2009Assignee: AU Optronics Corp.Inventors: Yuan-Hung Tung, Chih-Jui Pan
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Publication number: 20090189163Abstract: A TFT array substrate includes a substrate, a patterned first metallic layer, a patterned stack layer, a patterned dielectric layer, a patterned transparent conductive layer, and a patterned third metallic layer. Elements of each TFT in the TFT array substrate are arranged vertically, so that the TFT array substrate has relatively small fabrication area and is operable with a high conducting current. Further, the storage capacitance can be enhanced by enclosing or sandwiching the second metallic layer with the common lines and the transparent electrodes. In such a way, pixel flashing caused by those coupled signals can be reduced, thus promoting displaying quality thereof.Type: ApplicationFiled: March 11, 2009Publication date: July 30, 2009Applicant: AU OPTRONICS CORPORATIONInventors: Yeong-Feng Wang, Chih-Jui Pan, Liang-Bin Yu
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Patent number: 7528407Abstract: A TFT array substrate is provided. The TFT array substrate includes a substrate, a patterned first metallic layer, a patterned semiconductor layer, a patterned transparent conductive layer, a patterned dielectric layer, and a patterned second metallic layer. Elements of each TFT of the TFT array substrate are arranged vertically, so that the TFT array substrate has relatively small fabrication area and is operable with a high conducting current. Further, the storage capacitance can be enhanced by enclosing or sandwiching the transparent electrodes with the common lines and the second metallic layer, or alternatively by enclosing or sandwiching the second metallic layer with the common lines and the transparent electrodes.Type: GrantFiled: February 13, 2007Date of Patent: May 5, 2009Assignee: Au Optronics CorporationInventors: Yeong-Feng Wang, Chih-Jui Pan, Liang-Bin Yu
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Publication number: 20080116516Abstract: A TFT array substrate is provided. The TFT array substrate includes a substrate, a patterned first metallic layer, a patterned semiconductor layer, a patterned transparent conductive layer, a patterned dielectric layer, and a patterned second metallic layer. Elements of each TFT of the TFT array substrate are arranged vertically, so that the TFT array substrate has relatively small fabrication area and is operable with a high conducting current. Further, the storage capacitance can be enhanced by enclosing or sandwiching the transparent electrodes with the common lines and the second metallic layer, or alternatively by enclosing or sandwiching the second metallic layer with the common lines and the transparent electrodes.Type: ApplicationFiled: February 13, 2007Publication date: May 22, 2008Applicant: AU OPTRONICS CORPORATIONInventors: Yeong-Feng Wang, Chih-Jui Pan, Liang-Bin Yu
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Publication number: 20080087893Abstract: Lift-off method and half-tone photolithography are used to fabricate LCD TFT array plate. Only two photo masks are used to respectively define a first and a second metal layers to accomplish the LCD TFT array plate.Type: ApplicationFiled: October 12, 2007Publication date: April 17, 2008Applicant: AU OPTRONICS CORP.Inventors: Yeong-Feng Wang, Liang-Bin Yu, Chih-Jui Pan, Chun-Hao Tung
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Publication number: 20070291218Abstract: A method for manufacturing a liquid crystal display (LCD) panel, which uses an inkjet process to locate the spacers adjacent the protrusions to uniform the thickness of the liquid crystal layer. The spacers are located in the regions which are under/above the black matrix or the metal lines. Accordingly, the light leakage caused by the spacers is not present in the pixel region. Thus, an inventive LCD device can avoid the problem of light leakage generated by the pixel region of an LCD device with the conventional scattered spacers, and provide a high-contrast display quality. Further, the cost for manufacturing LCD devices can be effectively reduced, and the requirement of large-sized panel development can be met.Type: ApplicationFiled: March 27, 2007Publication date: December 20, 2007Applicant: AU Optronics Corp.Inventors: Chu-Min Chuang, Chih-Jui Pan, Shigeo Fuse
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Publication number: 20070258035Abstract: A liquid crystal display (LCD) array substrate and its manufacturing method are provided. Scan lines and data lines of the LCD array substrate are composed of two conductive layers to decrease their RC delay. Moreover, the dielectric layer and even the planarization layer are removed from pixel areas defined by the scan lines and the data lines to increase the light penetration percentage.Type: ApplicationFiled: December 5, 2006Publication date: November 8, 2007Applicant: AU Optronics CorporationInventors: Yeong-Feng Wang, Liang-Bin Yu, Chih-Jui Pan
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Publication number: 20070222929Abstract: A method for manufacturing an alignment layer is provided, which includes the following steps. First, a substrate is provided. Next, an auxiliary layer is formed on the substrate. Then, an alignment solution is sprayed on the auxiliary layer through an inkjet printing process. The alignment solution includes an alignment material and a first solvent, and the auxiliary layer has the same polarity as the first solvent. Then, by performing a curing process, the alignment solution is cured to form an alignment layer. As mentioned above, the method for manufacturing an alignment layer may be applied to manufacture an alignment layer with preferred smoothness.Type: ApplicationFiled: September 20, 2006Publication date: September 27, 2007Applicant: Quanta Display Inc.Inventors: Yuan-Hung Tung, Chih-Jui Pan
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Publication number: 20070032036Abstract: A liquid crystal display array substrate. A trench is in a substrate. A gate, a gate dielectric layer, a semiconductor layer and a doped semiconductor layer are disposed in the trench, wherein the semiconductor layer comprises a channel. A source electrode and a drain electrode are respectively electrically connected to portions of the semiconductor layer on opposite sides of the channel.Type: ApplicationFiled: August 4, 2006Publication date: February 8, 2007Applicant: QUANTA DISPLAY INC.Inventors: Yeong-Feng Wang, Chih-Jui Pan
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Publication number: 20060172091Abstract: A method of forming an alignment layer is described. A substrate comprising a display area and a non-display area is provided. A hydrophilic layer is formed on the substrate of the display area. A solution of an alignment material is dropped on the hydrophilic layer. The solution of the alignment material is solidified to form an alignment layer. Before dropping the solution of the alignment material on the hydrophilic layer, a hydrophobic layer may be formed on the substrate of the non-display area.Type: ApplicationFiled: January 23, 2006Publication date: August 3, 2006Inventors: Yuan-Hung Tung, Chih-Jui Pan