Patents by Inventor CHIH-JUNG HSU

CHIH-JUNG HSU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12388026
    Abstract: An electronic package includes a base of a rectangular shape, and a chip package including a first interface circuit die and a second interface circuit die. The first interface circuit die and second interface circuit die are mounted on a redistribution layer structure and encapsulated within a molding compound. The chip package is mounted on a top surface of the base and rotated relative to the base above a vertical axis that is orthogonal to the top surface through a rotation offset angle. A metal ring is mounted on the top surface of the base.
    Type: Grant
    Filed: October 24, 2023
    Date of Patent: August 12, 2025
    Assignee: MEDIATEK INC.
    Inventors: Yao-Chun Su, Chih-Jung Hsu, Yi-Jou Lin, I-Hsuan Peng
  • Publication number: 20250005257
    Abstract: A method for performing automatic layout defect checking (ALDC) control regarding circuit design, associated apparatus and an associated computer-readable medium are provided. The method applicable to a processing circuit may include: providing a web-based entry in an ALDC control system running on a processing circuit, for any user among multiple users to upload at least a layout file of a package substrate design of at least one package substrate to the ALDC control system, in order to obtain at least the layout file from a client electronic device through the web-based entry; utilizing at least one backend program module to check the layout file according to a plurality of predetermined layout defect checking rules to generate at least one checking result, and create a layout defect checking report of the package substrate design; and sending the layout defect checking report corresponding to the layout file to the client electronic device.
    Type: Application
    Filed: June 10, 2024
    Publication date: January 2, 2025
    Applicant: MEDIATEK INC.
    Inventors: Shu-Huan Chang, Yi-Hung Chen, Chih-Jung Hsu, Chen Lien, Guan-Qi Fang, Deng-Yao Tu, Po-Yang Chen
  • Publication number: 20240242016
    Abstract: A layout routing method includes determining a routing pattern according to a swapping rule, a via pattern, area constraints and pin locations; optimizing swapping in differential pairs according to the routing pattern; extracting features of each routing net to obtain extracted features; using an unsupervised algorithm to generate different routing groups according to the extracted features; and determining a routing order of the routing groups according to complex features of the routing groups.
    Type: Application
    Filed: December 25, 2023
    Publication date: July 18, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chih-Jung Hsu, Chen Lien, Deng-Yao Tu, Po-Yang Chen, Guan-Qi Fang, Shu-Huan Chang, Yi-Hung Chen, Yao-Chun Su, Yu-Yang Chen
  • Patent number: 11940388
    Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 26, 2024
    Assignee: IXENSOR CO., LTD.
    Inventors: Yenyu Chen, An Cheng Chang, Tai I Chen, Su Tung Yang, Chih Jung Hsu, Chun Cheng Lin, Min Han Wang, Shih Hao Chiu
  • Publication number: 20240055358
    Abstract: An electronic package includes a base of a rectangular shape, and a chip package including a first interface circuit die and a second interface circuit die. The first interface circuit die and second interface circuit die are mounted on a redistribution layer structure and encapsulated within a molding compound. The chip package is mounted on a top surface of the base and rotated relative to the base above a vertical axis that is orthogonal to the top surface through a rotation offset angle. A metal ring is mounted on the top surface of the base.
    Type: Application
    Filed: October 24, 2023
    Publication date: February 15, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yao-Chun Su, Chih-Jung Hsu, Yi-Jou Lin, I-Hsuan Peng
  • Patent number: 11830820
    Abstract: An electronic package includes a package substrate of a rectangular shape, and a chip package including a first interface circuit die and a second interface circuit die. The first interface circuit die and second interface circuit die are mounted on a redistribution layer structure and encapsulated within a molding compound. The chip package is mounted on a top surface of the package substrate and rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through a rotation offset angle. A metal ring is mounted on the top surface of the package substrate.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: November 28, 2023
    Assignee: MEDIATEK INC.
    Inventors: Yao-Chun Su, Chih-Jung Hsu, Yi-Jou Lin, I-Hsuan Peng
  • Publication number: 20220108954
    Abstract: An electronic package includes a package substrate of a rectangular shape, and a chip package including a first interface circuit die and a second interface circuit die. The first interface circuit die and second interface circuit die are mounted on a redistribution layer structure and encapsulated within a molding compound. The chip package is mounted on a top surface of the package substrate and rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through a rotation offset angle. A metal ring is mounted on the top surface of the package substrate.
    Type: Application
    Filed: December 16, 2021
    Publication date: April 7, 2022
    Applicant: MEDIATEK INC.
    Inventors: Yao-Chun Su, Chih-Jung Hsu, Yi-Jou Lin, I-Hsuan Peng
  • Patent number: 11222850
    Abstract: An electronic package configured to operate at Gigabit-per-second (Gbps) data rates is disclosed. The electronic package includes a package substrate of a rectangular shape. A chip package having a first high-speed interface circuit die is mounted on a top surface of the package substrate. The chip package is rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through about 45 degrees. The first high-speed interface circuit die includes a first Serializer/Deserializer (SerDes) circuit block.
    Type: Grant
    Filed: April 12, 2020
    Date of Patent: January 11, 2022
    Assignee: MEDIATEK INC.
    Inventors: Yao-Chun Su, Chih-Jung Hsu, Yi-Jou Lin, I-Hsuan Peng
  • Publication number: 20200365515
    Abstract: An electronic package configured to operate at Gigabit-per-second (Gbps) data rates is disclosed. The electronic package includes a package substrate of a rectangular shape. A chip package having a first high-speed interface circuit die is mounted on a top surface of the package substrate. The chip package is rotated relative to the package substrate above a vertical axis that is orthogonal to the top surface through about 45 degrees. The first high-speed interface circuit die includes a first Serializer/Deserializer (SerDes) circuit block.
    Type: Application
    Filed: April 12, 2020
    Publication date: November 19, 2020
    Inventors: Yao-Chun Su, Chih-Jung Hsu, Yi-Jou Lin, I-Hsuan Peng
  • Publication number: 20200080942
    Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).
    Type: Application
    Filed: March 16, 2018
    Publication date: March 12, 2020
    Applicant: iXensor CO., LTD.
    Inventors: Yenyu CHEN, An Cheng CHANG, Tai I CHEN, Su Tung YANG, Chih Jung HSU, Chun Cheng LIN, Min Han WANG, Shih Hao CHIU
  • Publication number: 20170093149
    Abstract: A motor driving circuit and a method for detecting output phase loss are disclosed, which detect and integrate a three-phase direct current to generate a current integration, and to determine whether a motor configured in the motor driving circuit operates in a phase loss condition according to the current value of the current integration. When the current value of the current integration is a constant value, the motor driving circuit determines that the motor operates in a normal condition, and drives the motor continuously. When the current value of the current integration is a low current value (e.g., 0 A), the motor driving circuit determines that the motor operates in a phase loss condition, and stops driving the motor. Therefore, when the motor driving circuit and the method generate the higher current because of operating in the phase loss condition, it can avoid burning out the motor driving circuit.
    Type: Application
    Filed: November 29, 2015
    Publication date: March 30, 2017
    Inventors: PANG-YOU LIU, CHIH-JUNG HSU, CHI-PHON LIN