Patents by Inventor CHIH-KAI CHENG

CHIH-KAI CHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FAN
    Publication number: 20240084813
    Abstract: A fan includes a fan hub and multiple blades. At least one blade includes a blade body and two extended blade portions. The two extended blade portions are connected to a first edge and a second edge on the blade body. The first edge and the second edge are opposite to sides of the blade body. In a top view, at least one of the two extended blade portions has a first width that is adjacent to the fan hub, and a second width that is away from the fan hub. The second width is larger than the first width. The second width and the first width are connected by a continuous surface. The width of the continuous surface increases away from the first width.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 14, 2024
    Inventors: Yi-Lun CHENG, Chih Kai YANG
  • Patent number: 11923310
    Abstract: A package structure and method for forming the same are provided. The package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Kai Cheng, Tsung-Shu Lin, Tsung-Yu Chen, Hsien-Pin Hu, Wen-Hsin Wei
  • Publication number: 20230347388
    Abstract: Cleaning tools for cleaning the pull cable of an ingot puller apparatus and methods for cleaning the pull cable are disclosed. The cleaning tool includes a chamber for receiving the pull cable. Pressurized fluid is discharged through one or more nozzles to detach debris from the pull cable. The fluid and debris are collected in an exhaust plenum of the cleaning tool and are expelled through an exhaust tube. The cleaning tool includes one or more guides that guide the cleaning tool in an upper segment of the ingot puller apparatus.
    Type: Application
    Filed: April 14, 2023
    Publication date: November 2, 2023
    Inventors: Chin-Hung Ho, Chih-Kai Cheng, Chen-Yi Lin, Feng-Chien Tsai, Tung-Hsiao Li, YoungGil Jeong, Jin Yong Uhm
  • Publication number: 20210375769
    Abstract: A package structure and method for forming the same are provided. The package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.
    Type: Application
    Filed: August 9, 2021
    Publication date: December 2, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Kai CHENG, Tsung-Shu LIN, Tsung-Yu CHEN, Hsien-Pin HU, Wen-Hsin WEI
  • Publication number: 20210272875
    Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Inventors: Yuan Sheng Chiu, Chih-Kai Cheng, Tsung-Shu Lin
  • Patent number: 11088079
    Abstract: A package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: August 10, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Kai Cheng, Tsung-Shu Lin, Tsung-Yu Chen, Hsien-Pin Hu, Wen-Hsin Wei
  • Patent number: 11011451
    Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.
    Type: Grant
    Filed: April 4, 2019
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yuan Sheng Chiu, Chih-Kai Cheng, Tsung-Shu Lin
  • Publication number: 20200411440
    Abstract: A package structure and method for forming the same are provided. The package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 31, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Kai CHENG, Tsung-Shu LIN, Tsung-Yu CHEN, Hsien-Pin HU, Wen-Hsin WEI
  • Publication number: 20200185304
    Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.
    Type: Application
    Filed: April 4, 2019
    Publication date: June 11, 2020
    Inventors: Yuan Sheng Chiu, Chih-Kai Cheng, Tsung-Shu Lin
  • Publication number: 20180166715
    Abstract: The present invention provides a fuel cell system and a startup and shutdown method therefor for avoiding carbon corrosion. The fuel cell system includes at least one fuel cell reaction module with at least one anode chamber to contain an anode reaction fluid. The method includes steps of: (a) executing a shutdown mode, (b) conducting and connecting a first load to the fuel cell reaction module so as to consume the anode reaction fluid remained in the anode chamber, (c) providing a buffer fluid to the anode chamber and disconnecting the first load from the anode chamber; (d) maintaining the fuel cell system shutdown, (e) executing a startup mode, (f) providing the anode reaction fluid to the anode chamber, and (g) conducting and connecting a second load to the fuel cell reaction module and maintaining the fuel cell system operated continuously.
    Type: Application
    Filed: June 12, 2017
    Publication date: June 14, 2018
    Inventors: Jefferson YS Yang, Fang-Bor Weng, Chih-Kai Cheng, Tzu-Wei Kuo
  • Patent number: 9711478
    Abstract: A semiconductor device with an anti-pad peeling structure is disclosed. The semiconductor device includes: a semiconductor substrate including a Through Substrate Via (TSV); a dielectric layer on the semiconductor substrate and including a plurality of recesses therein; and a pad above the semiconductor substrate to cover a portion of the dielectric layer and extend to the recesses; wherein the pad extends to the plurality of recesses, and a plurality of contact points are confined in the recesses between the pad and the conductive layer, and each of the contact points is at least partially excluded from a boundary of the TSV when being seen from a top-down perspective.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: July 18, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Kai Cheng, Cheng-Chieh Hsieh, Shih-Wen Huang
  • Publication number: 20170110429
    Abstract: A semiconductor device with an anti-pad peeling structure is disclosed. The semiconductor device includes: a semiconductor substrate including a Through Substrate Via (TSV); a dielectric layer on the semiconductor substrate and including a plurality of recesses therein; and a pad above the semiconductor substrate to cover a portion of the dielectric layer and extend to the recesses; wherein the pad extends to the plurality of recesses, and a plurality of contact points are confined in the recesses between the pad and the conductive layer, and each of the contact points is at least partially excluded from a boundary of the TSV when being seen from a top-down perspective.
    Type: Application
    Filed: October 19, 2015
    Publication date: April 20, 2017
    Inventors: CHIH-KAI CHENG, CHENG-CHIEH HSIEH, SHIH-WEN HUANG