Abstract: One aspect provides a method and system for saturation of multiple I/O slots by multiple testing ports and verification of link health in between. During operation, the system detects a testing card with a plurality of test ports which are coupled to a plurality of input/output (I/O) slots of a computing device. The system communicates with the plurality of test ports via the plurality of I/O slots. The system generates, by the computing device, a script for each test port, wherein the script comprises a series of read and write operations to be executed by the testing card on a memory device associated with the computing device. The system allows the plurality of test ports to execute the script and perform the corresponding read operations and write operations, thereby facilitating testing of the I/O slots of the computing device in parallel by the test ports of the single testing card.

Abstract: One aspect provides a method and system for saturation of multiple I/O slots by multiple testing ports and verification of link health in between. During operation, the system detects a testing card with a plurality of test ports which are coupled to a plurality of input/output (I/O) slots of a computing device. The system communicates with the plurality of test ports via the plurality of I/O slots. The system generates, by the computing device, a script for each test port, wherein the script comprises a series of read and write operations to be executed by the testing card on a memory device associated with the computing device. The system allows the plurality of test ports to execute the script and perform the corresponding read operations and write operations, thereby facilitating testing of the I/O slots of the computing device in parallel by the test ports of the single testing card.

Abstract: Allocating power between multiple central processing units (CPUs) in a multi-CPU processor based on total current availability and individual CPU quality-of-service (QoS) requirements is disclosed. Current from a power rail is allocated to CPUs by a global current manger (GCM) circuit related to performance criteria set by CPUs. The CPUs can request increased current allocation from the GCM circuit, such as in response to executing a higher performance task. If the increased current allocation request keeps total current on the power rail within its maximum rail current limit, the GCM circuit approves the request to allow the CPU increased current allocation. This can allow CPUs executing higher performance tasks to have a larger current allocation than CPUs executing lower performance tasks without the maximum rail current limit being exceeded, and without having to necessarily lower voltage of the power rail, which could unnecessarily lower performance of all CPUs.

Abstract: Allocating power between multiple central processing units (CPUs) in a multi-CPU processor based on total current availability and individual CPU quality-of-service (QoS) requirements is disclosed. Current from a power rail is allocated to CPUs by a global current manger (GCM) circuit related to performance criteria set by CPUs. The CPUs can request increased current allocation from the GCM circuit, such as in response to executing a higher performance task. If the increased current allocation request keeps total current on the power rail within its maximum rail current limit, the GCM circuit approves the request to allow the CPU increased current allocation. This can allow CPUs executing higher performance tasks to have a larger current allocation than CPUs executing lower performance tasks without the maximum rail current limit being exceeded, and without having to necessarily lower voltage of the power rail, which could unnecessarily lower performance of all CPUs.

Abstract: A direct memory access (DMA) system is implemented in an electronic device that communicates with a host device via a communication bus, and includes an available descriptor notification circuit and a DMA controller. The available descriptor notification circuit indicates whether at least one valid descriptor is available in the host device. The available descriptor notification circuit is set by at least the host device. The at least one valid descriptor records DMA data transfer control information. The DMA controller fetches the at least one valid descriptor from the host device when the available descriptor notification circuit indicates that the at least one valid descriptor is available in the host device, and refers to the at least one valid descriptor fetched from the host device to perform a DMA data transfer between the electronic device and the host device.

Abstract: Methods, systems, and computer program products for forwarding store data to loads in a pipelined processor are provided. In one implementation, a processor is provided that includes a decoder operable to decode an instruction, and a plurality of execution units operable to respectively execute a decoded instruction from the decoder. The plurality of execution units include a load/store execution unit operable to execute decoded load instructions and decoded store instructions and generate corresponding load memory operations and store memory operations. The store queue is operable to buffer one or more store memory operations prior to the one or more memory operations being completed, and the store queue is operable to forward store data of the one or more store memory operations buffered in the store queue to a load memory operation on a byte-by-byte basis.

Abstract: A device for removing compounds in tissue such as, for example, tattoo pigment compounds in skin tissue includes a detector for detecting the peak optical absorption of the compound, a laser source, wherein the wavelength is tuned or selected based on the peak optical absorption of the compound in the skin. The device further includes a delivery member for delivering radiation from the laser source to the tissue. Compounds such as tattoo pigment compounds are removed by detecting the peak optical absorption of the tattoo pigments or photofragments thereof in tissue with the detector. The wavelength of the laser source is adjusted based on the peak optical absorption of the compound in the tissue, and delivers radiation at the adjusted (or non-adjusted) wavelength from the laser source to the compound in the tissue with the delivery member.

Abstract: Methods, systems, and computer program products for forwarding store data to loads in a pipelined processor are provided. In one implementation, a processor is provided that includes a decoder operable to decode an instruction, and a plurality of execution units operable to respectively execute a decoded instruction from the decoder. The plurality of execution units include a load/store execution unit operable to execute decoded load instructions and decoded store instructions and generate corresponding load memory operations and store memory operations. The store queue is operable to buffer one or more store memory operations prior to the one or more memory operations being completed, and the store queue is operable to forward store data of the one or more store memory operations buffered in the store queue to a load memory operation on a byte-by-byte basis.

Abstract: A kiln formed glass decorated casing for cellular phone is constructed to include a casing for cellular phone, the casing having a recessed portion in the outside wall, and a sheet of kiln formed glass member peripherally packed with a metal packing material and bonded with the metal packing material to the recessed portion in flush with the outside wall of the casing.