Patents by Inventor Chih-Liang Leon Huang

Chih-Liang Leon Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for improving a load independent buffer
    Patent number: 9509292
    Abstract: Described herein are apparatus, system, and method for reducing electrical over-stress of transistors and for generating an output with deterministic duty cycle for load independent buffers. The apparatus comprises a feedback capacitor electrically coupled between an input terminal and an output terminal of a buffer; and a switch, electrically parallel to the feedback capacitor and operable to electrically short the feedback capacitor in response to a control signal, wherein the switch causes a deterministic voltage level on the input terminal.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: November 29, 2016
    Assignee: Intel Corporation
    Inventors: Vinu K. Elias, Chih-Liang Leon Huang
  • METHOD AND APPARATUS FOR IMPROVING A LOAD INDEPENDENT BUFFER
    Publication number: 20160241244
    Abstract: Described herein are apparatus, system, and method for reducing electrical over-stress of transistors and for generating an output with deterministic duty cycle for load independent buffers. The apparatus comprises a feedback capacitor electrically coupled between an input terminal and an output terminal of a buffer; and a switch, electrically parallel to the feedback capacitor and operable to electrically short the feedback capacitor in response to a control signal, wherein the switch causes a deterministic voltage level on the input terminal.
    Type: Application
    Filed: April 21, 2016
    Publication date: August 18, 2016
    Inventors: Vinu K. Elias, Chih-Liang Leon Huang
  • METHOD AND APPARATUS FOR IMPROVING A LOAD INDEPENDENT BUFFER
    Publication number: 20130249603
    Abstract: Described herein are apparatus, system, and method for reducing electrical over-stress of transistors and for generating an output with deterministic duty cycle for load independent buffers. The apparatus comprises a feedback capacitor electrically coupled between an input terminal and an output terminal of a buffer; and a switch, electrically parallel to the feedback capacitor and operable to electrically short the feedback capacitor in response to a control signal, wherein the switch causes a deterministic voltage level on the input terminal.
    Type: Application
    Filed: September 29, 2011
    Publication date: September 26, 2013
    Inventors: Vinu K. Elias, Chih-Liang Leon Huang