Patents by Inventor Chih-Ling Hung

Chih-Ling Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096927
    Abstract: The present invention provides a silicon capacitor structure, including a substrate, an interlayer dielectric (ILD) layer on the substrate, a capacitor recess extending from a surface of the ILD layer into the substrate, a capacitor in the capacitor recess, wherein the capacitor includes a bottom electrode on a surface of the capacitor recess, a capacitive dielectric layer on a surface of the bottom electrode, and a top electrode on a surface of the capacitive dielectric layer and filling up the capacitor recess.
    Type: Application
    Filed: March 2, 2023
    Publication date: March 21, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Li-Peng Chang, Chih-Ling Hung, San-Jung Chang
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 9691874
    Abstract: A manufacturing method of a semiconductor structure provides a substrate. A well having a first conductive type and a well having a second conductive type are formed in the substrate, respectively. A body region is formed in the well having the second conductive type. A first doped region and a second doped region are formed in the well having the first conductive type and the body region respectively. The first and second doped regions have same polarities, and a dopant concentration of the second doped region is higher than that of the first doped region. A third doped region is formed in the well having the second conductive type and between the first and second doped regions. The third and first doped regions have reverse polarities. A first field plate is formed on a surface region between the second and third doped regions.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: June 27, 2017
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chih-Ling Hung, Chien-Wen Chu, Hsin-Liang Chen, Wing-Chor Chan
  • Patent number: 9263429
    Abstract: A semiconductor device and a manufacturing method of the same are provided. The semiconductor device includes a substrate, a first doping region, a first well, a resistor element, and a first, a second, and a third heavily doping regions. The first well and the third heavily doping region are disposed in the first doping region, which is disposed on the substrate. The first heavily doping region and the second heavily doping region, which are separated from each other, are disposed in the first well. The second and the third heavily doping regions are electrically connected via the resistor element. Each of the substrate, the first well, and the second heavily doping region has a first type doping. Each of the first doping region, the first heavily doping region, and the third heavily doping region has a second type doping, complementary to the first type doping.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: February 16, 2016
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chih-Ling Hung, Hsin-Liang Chen, Wing-Chor Chan
  • Publication number: 20150179754
    Abstract: A semiconductor structure includes a substrate, a first well having a first conductive type, a second well having a second conductive type, a body region, a first doped region, a second doped region, a third doped region and a field plate. The first and second wells are formed in the substrate. The body region is formed in the second well. The first and second doped regions are formed in the first well and the body region, respectively. The second and first doped regions have the same polarities, and the dopant concentration of the second doped region is higher than that of the first doped region. The third doped region is formed in the second well and located between the first and second doped regions. The third and first doped regions have reverse polarities. The field plate is formed on the surface region between the first and second doped regions.
    Type: Application
    Filed: March 9, 2015
    Publication date: June 25, 2015
    Inventors: Chih-Ling Hung, Chien-Wen Chu, Hsin-Liang Chen, Wing-Chor Chan
  • Patent number: 9029976
    Abstract: Provided is a semiconductor device which increases a concentration around an emitter by arranging a lightly doped region (HNMLDD). When the semiconductor device is operated in a forward bias, a maximum common-emitter current gain is obtained in a forward-active region, such that signals are amplified and an unnecessary noise is decreased at the same time. Further, the semiconductor device of the invention further includes a field plate disposed on a substrate between the emitter and a base or/and the collector and the base, and configured to change a potential distribution of junctions between each of doped regions and raise a breakdown voltage of the junctions.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: May 12, 2015
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Chih-Ling Hung, Hsin-Liang Chen, Wing-Chor Chan
  • Patent number: 9029952
    Abstract: A semiconductor structure includes a substrate, a first well having a first conductive type, a second well having a second conductive type, a body region, a first doped region, a second doped region, a third doped region and a field plate. The first and second wells are formed in the substrate. The body region is formed in the second well. The first and second doped regions are formed in the first well and the body region, respectively. The second and first doped regions have the same polarities, and the dopant concentration of the second doped region is higher than that of the first doped region. The third doped region is formed in the second well and located between the first and second doped regions. The third and first doped regions have reverse polarities. The field plate is formed on the surface region between the first and second doped regions.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: May 12, 2015
    Assignee: Macronix International Co., Ltd.
    Inventors: Chih-Ling Hung, Chien-Wen Chu, Hsin-Liang Chen, Wing-Chor Chan
  • Publication number: 20150048415
    Abstract: A semiconductor device and a manufacturing method of the same are provided. The semiconductor device includes a substrate, a first doping region, a first well, a resistor element, and a first, a second, and a third heavily doping regions. The first well and the third heavily doping region are disposed in the first doping region, which is disposed on the substrate. The first heavily doping region and the second heavily doping region, which are separated from each other, are disposed in the first well. The second and the third heavily doping regions are electrically connected via the resistor element. Each of the substrate, the first well, and the second heavily doping region has a first type doping. Each of the first doping region, the first heavily doping region, and the third heavily doping region has a second type doping, complementary to the first type doping.
    Type: Application
    Filed: August 19, 2013
    Publication date: February 19, 2015
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chih-Ling Hung, Hsin-Liang Chen, Wing-Chor Chan
  • Publication number: 20140152349
    Abstract: A semiconductor device, a manufacturing method thereof and an operating method thereof are provided. The semiconductor device includes a substrate, a first well, a second well, a first heavily doping region, a second heavily doping region, a third heavily doping region, and an electrode layer. The first and the second wells are disposed on the substrate. The first and the third heavily doping regions, which are separated from each other, are disposed in the first well, and the second heavily doping region is disposed in the second well. The electrode layer is disposed on the first well. Each of the second well, the first heavily doping region, and the second heavily doping region has a first type doping. Each of the substrate, the first well, and the third heavily doping region has a second type doping, which is complementary to the first type doping.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chih-Ling Hung, Hsin-Liang Chen, Wing-Chor Chan
  • Patent number: 8669639
    Abstract: A semiconductor element, a manufacturing method thereof and an operating method thereof are provided. The semiconductor element includes a substrate, a first well, a second well, a third well, a fourth well, a bottom layer, a first heavily doping region, a second heavily doping region, a third heavily doping region and a field plane. The first well, the bottom layer and the second well surround the third well for floating the third well and the substrate. The first, the second and the third heavily doping regions are disposed in the first, the second and the third wells respectively. The field plate is disposed above a junction between the first well and the fourth well.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: March 11, 2014
    Assignee: Macronix International Co., Ltd.
    Inventors: Chih-Ling Hung, Chien-Wen Chu, Hsin-Liang Chen, Wing-Chor Chan
  • Publication number: 20130328170
    Abstract: A semiconductor element, a manufacturing method thereof and an operating method thereof are provided. The semiconductor element includes a substrate, a first well, a second well, a third well, a fourth well, a bottom layer, a first heavily doping region, a second heavily doping region, a third heavily doping region and a field plane. The first well, the bottom layer and the second well surround the third well for floating the third well and the substrate. The first, the second and the third heavily doping regions are disposed in the first, the second and the third wells respectively. The field plate is disposed above a junction between the first well and the fourth well.
    Type: Application
    Filed: June 11, 2012
    Publication date: December 12, 2013
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chih-Ling Hung, Chien-Wen Chu, Hsin-Liang Chen, Wing-Chor Chan
  • Publication number: 20130277805
    Abstract: A semiconductor structure includes a substrate, a first well having a first conductive type, a second well having a second conductive type, a body region, a first doped region, a second doped region, a third doped region and a field plate. The first and second wells are formed in the substrate. The body region is formed in the second well. The first and second doped regions are formed in the first well and the body region, respectively. The second and first doped regions have the same polarities, and the dopant concentration of the second doped region is higher than that of the first doped region. The third doped region is formed in the second well and located between the first and second doped regions. The third and first doped regions have reverse polarities. The field plate is formed on the surface region between the first and second doped regions.
    Type: Application
    Filed: April 19, 2012
    Publication date: October 24, 2013
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chih-Ling Hung, Chien-Wen Chu, Hsin-Liang Chen, Wing-Chor Chan