Abstract: A clock recovery device is provided. The clock recovery device includes a clock data recovery circuit and a fast relock circuit. The clock data recovery circuit is configured to generate an output clock signal in response to an input clock signal. The clock data recovery circuit includes a charge pump for generating a control voltage and a voltage controlled block for generating the output clock signal based on the control voltage. The fast relock circuit is configured to convert a comparison signal indicating a comparison result between the input clock signal and the output clock signal to an analog output voltage. When the charge pump is disabled, an output path of the fast relock circuit is turned on, and the analog output voltage is applied to an input of the voltage controlled block.