Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes an active region including a channel region and a source/drain region and extending along a first direction, and a source/drain contact structure over the source/drain region. The source/drain contact structure includes a base portion extending lengthwise along a second direction perpendicular to the first direction, and a via portion over the base portion. The via portion tapers away from the base portion.

Abstract: A decision-feedback equalizer (DFE) includes a combining circuit and a feedback filter. The combining circuit combines an input signal and at least one feedback signal to generate an equalized signal. The feedback filter generates the at least one feedback signal according to the equalized signal, and includes a controllable delay circuit. The controllable delay circuit receives an output signal that is derived from the equalized signal, and applies at least one delay amount to generate at least one delay signal, wherein the at least one feedback signal is derived from the at least one delay signal.

Abstract: A transceiver and a clock generation module are provided. The transceiver includes a receiver and the clock generation module. The receiver receives a receiving-input-data and a receiving-input-strobe. The receiver includes a data-receiving circuit for delaying the receiving-input-data and a strobe-receiving circuit for delaying the receiving-input-strobe. The clock generation module includes a calibration circuit, a phase-compensation module, and a multi-phase signal generator. The phase-compensation module compensates one of the data-receiving circuit and the strobe-receiving circuit according to a data-phase-compensation signal and a strobe-phase-compensation signal generated by the calibration circuit. The multi-phase signal generator generates shifted system-clock signals. A phase difference between the first and the second shifted system-clock signals is equivalent to a phase difference between the receiving-path-data and the receiving-path-strobe.

Abstract: A transceiver and a clock generation module are provided. The transceiver includes a receiver and the clock generation module. The receiver receives a receiving-input-data and a receiving-input-strobe. The receiver includes a data-receiving circuit for delaying the receiving-input-data and a strobe-receiving circuit for delaying the receiving-input-strobe. The clock generation module includes a calibration circuit, a phase-compensation module, and a multi-phase signal generator. The phase-compensation module compensates one of the data-receiving circuit and the strobe-receiving circuit according to a data-phase-compensation signal and a strobe-phase-compensation signal generated by the calibration circuit. The multi-phase signal generator generates shifted system-clock signals. A phase difference between the first and the second shifted system-clock signals is equivalent to a phase difference between the receiving-path-data and the receiving-path-strobe.

Abstract: A delay signal generating apparatus has a digitally controlled delay line and a control circuit. The digitally controlled delay line has a coarse delay circuit and a fine delay circuit. The coarse delay circuit generates a plurality of coarse delay signals by applying a plurality of different coarse delay amounts to an input signal, respectively, wherein the different coarse delay amounts are set by a first control input. The fine delay circuit generates a fine delay signal having a fine delay amount with respect to the input signal by performing phase interpolation based on the coarse delay signals, wherein the fine delay amount is set by a second control input. The control circuit generates the first control input to the coarse delay circuit, and generates the second control input to the fine delay circuit, wherein the control circuit does not change the first control input unless one of the coarse delay signals has no contribution to the fine delay signal according to the second control input.

Abstract: A delay signal generating apparatus has a digitally controlled delay line and a control circuit. The digitally controlled delay line has a coarse delay circuit and a fine delay circuit. The coarse delay circuit generates a plurality of coarse delay signals by applying a plurality of different coarse delay amounts to an input signal, respectively, wherein the different coarse delay amounts are set by a first control input. The fine delay circuit generates a fine delay signal having a fine delay amount with respect to the input signal by performing phase interpolation based on the coarse delay signals, wherein the fine delay amount is set by a second control input. The control circuit generates the first control input to the coarse delay circuit, and generates the second control input to the fine delay circuit, wherein the control circuit does not change the first control input unless one of the coarse delay signals has no contribution to the fine delay signal according to the second control input.

Abstract: A prism sheet for a LCD backlight module is provided. The prism sheet contains a base layer and a prism layer formed on a side of the base layer. The prism layer contains multiple parallel latitudinal and longitudinal prism lenses intersecting with each other. As such, the prism sheet could provide both latitudinal and longitudinal convergence for the scattered lights from the diffusion film. Additionally, by adjusting the apex angles, shapes, and heights of the prism lenses, optimal horizontal and vertical viewing angles of the LCD display could be achieved.

Abstract: A prism sheet for a LCD backlight module is provided. The prism sheet contains a base layer and a prism layer formed on a side of the base layer. The prism layer contains multiple parallel latitudinal and longitudinal prism lenses intersecting with each other. As such, the prism sheet could provide both latitudinal and longitudinal convergence for the scattered lights from the diffusion film. Additionally, by adjusting the apex angles, shapes, and heights of the prism lenses, optimal horizontal and vertical viewing angles of the LCD display could be achieved.