Abstract: A manufacturing method of a non-volatile memory includes first providing a substrate for defining multiple pairs of active regions; forming a control gate in one of each pair of the active regions of the substrate; sequentially forming a gate oxide layer, a conductor layer, and a patterned mask layer on the substrate, wherein the patterned mask layer exposes a portion of the conductor layer; forming a first dielectric layer on the exposed portion of the conductor layer; removing the patterned mask layer; removing the conductor layer without covering the first dielectric layer, and using the remained conductor layer as the floating gate; forming a second dielectric layer on sidewalls of the floating gate; forming an erase gate above the floating gate and correspondingly above the control gate, and forming a source region and a drain region in the other one of each pair of the active regions

Abstract: A non-volatile memory is provided, including a control gate, a floating gate, a gate oxide layer, a source region, a drain region, a first dielectric layer, a second dielectric layer, and an erase gate. The control gate is disposed in a substrate. The floating gate comprising a coupling part and a gate part is disposed over the control gate and located over a portion of the substrate with the gate oxide layer there-between. The source region adjoins with one side of the gate part, while the drain region adjoins with the other side of the gate part. The first dielectric layer is disposed on the floating gate. The second dielectric layer is disposed on the sidewalls of the floating gate. The erase gate is disposed over the coupling part of the floating gate and covers the first dielectric layer and the second dielectric layer.