Abstract: A wearable device includes a host, a side head strap module, and an upper head strap module. The host has a sliding rail. The side head strap module is connected to the host. The upper head strap module includes a sliding base, a front buckle, and an upper head strap. The sliding base is detachably coupled to the sliding rail and slides along the sliding rail. The sliding rail has a first engaging part. The sliding base has a second engaging part. An engagement between the first engaging part and the second engaging part temporarily fixes the sliding base to the sliding rail. The front buckle is pivotally connected to the sliding base. The upper head strap is connected between the side head strap module and the front buckle. In addition, an upper head strap module applied to the wearable device is also proposed.

Abstract: A joint module for offsetting manufacturing tolerance comprises an outer joint support, a middle joint support, an inner joint support, a plug connector, and a reset component. The middle joint support is rotatably and movably connected to the outer joint support along a first axis. The inner joint support is rotatable and movable connected to the middle joint support along a second axis. The plug connector is connected to the inner joint support. The reset component is placed between the outer joint support, the middle joint support, and the inner joint support to reset the middle joint support and the inner joint support. When the joint module is reset, a third axis of the plug connector is perpendicular to the first axis and the second axis, the plug connector moves along the third axis to connect a plug. A computing device with the joint module is also disclosed.

Abstract: A connector for connecting to a first connecting member comprises a first supporting member, a second supporting member and an elastic member. A mounting hole is defined on the first supporting member for movable connecting to the first supporting member. The second supporting member is configured to be able to deflect axially relative to the first supporting member. The elastic member comprises a first ring body and a second ring body. A gap is defined between the first ring body and the second ring body for translating or deflecting the first ring body relative to the second ring body. When the second supporting member moves and/or deflects relative to the first supporting member, the first ring body and the second ring body are forced to translate and/or deflect relative to each other. The connector is applied in the server and computer for accommodating the accumulated tolerance.

Abstract: A circuit board structure includes a core layer, at least one electroplating metal layer, at least one dielectric layer and at least one conductive metal layer. The core layer includes at least one dielectric portion and at least one metal portion. The electroplating metal layer is disposed on at least one of a first surface and a second surface of the core layer, exposing a portion of at least one of the first surface and the second surface and at least connecting the at least one metal part. The dielectric layer is disposed on at least one of the first surface and the second surface and on the electroplating metal layer. The dielectric layer has at least one opening exposing a portion of the electroplating metal layer. The conductive metal layer is disposed in the opening of the dielectric layer and is correspondingly connected to the electroplating metal layer.

Abstract: Methods and apparatus provide in-situ pressure sensors for apparatus used in semiconductor manufacturing processes. In some embodiments, the apparatus may comprise a showerhead body, a first gas channel of the showerhead body, a second gas channel of the showerhead body, one or more first gas pressure sensors positioned on a surface of the first gas channel, and one or more second gas pressure sensors positioned on a surface of the second gas channel. The apparatus may be formed by additive manufacturing including the pressure sensors and electrical connections to the pressure sensors. In some embodiments, a controller may be utilized to control semiconductor processes based on the pressure readings from the in-situ pressure sensors.

Abstract: A joint module for offsetting manufacturing tolerance comprises an outer joint, a middle joint, an inner joint, a plug connector, and a reset component. The middle joint is movable in radial directions of an axis of the outer joint. The inner joint is rotatable around radial directions of an axis of the middle joint, and the axis of the middle joint is parallel to the axis of the outer joint. The plug connector is fixed to the inner joint. The reset component is placed between the outer joint, the middle joint, and the inner joint, to reset the middle joint and the inner joint until the axis of the plug connector, the outer joint, and the middle joint are coincided. A server system with the joint module is also disclosed.

Abstract: An electrochemical cell for sensing gas has added mechanical support for the working electrode to prevent flexure of the working electrode due to pressure differentials. The added mechanical support includes: 1) affixing a larger area of the working electrode to the body of the cell; 2) a gas vent to a cavity of the body to equalize pressures; 3) a rigid electrolyte layer abutting a back surface of the working electrode; 4) infusing an adhesive deep into sides of the porous working electrode to enhance rigidity; 5) supporting opposing surfaces of the working electrode with the rigid package body; and 6) other techniques to make the working electrode more rigid. A bias circuit is also described that uses a controllable current source, an integrator of the varying current, and a feedback circuit for supplying a voltage to the counter electrode and a bias voltage to the reference electrode.

Abstract: An electronic cabinet lock includes a handgrip pivotably connected with a housing unit, a swingable member swingably disposed on the handgrip, and first and second magnet members disposed on the handgrip and the swingable member and constantly attractive with each other. A latch member is controlled by a control unit to move in the up-down direction to be disposed forwardly of and abut against an upper end of the swingable member. A lock cylinder unit is disposed below the handgrip and includes a lock tongue movable in the up-down direction to be disposed forwardly of and abut against a lower end of the swingable member. During swinging of the swingable member where the swingable member is in abutting engagement with the latch member or the lock tongue, with the magnet members, the swingable member is moved back to render the swingable member well functioning after long term use.

Abstract: A bonded assembly may be formed by providing at least a first packaging substrate in a low-oxygen ambient; providing at least a first semiconductor package in the low-oxygen ambient; performing a first plasma package-treatment process on the first semiconductor package in the low-oxygen ambient by directing at least one first plasma jet to first solder material portions bonded to the first semiconductor package; and bringing the first solder material portions onto, or in proximity to, first substrate-side bonding structures located on the first packaging substrate while the at least one first plasma jet is directed to the first solder material portions. The first substrate-side bonding structures are treated with the first plasma jet. The first semiconductor package is bonded to the first packaging substrate while, or after, the first substrate-side bonding structures are treated with the first plasma jet.

Abstract: A bonded assembly may be formed by providing a wafer comprising at least a first packaging substrate and a second packaging substrate in a low-oxygen ambient; performing a first plasma package-treatment process on the first semiconductor package in the low-oxygen ambient while performing a first substrate-treatment process on the first packaging substrate in a low-oxygen ambient having an oxygen partial pressure that is lower than 17 kPa; and performing a second plasma package-treatment process on the second semiconductor package while performing a second substrate-treatment process on the second packaging substrate and while bonding the first semiconductor package to the first packaging substrate.

Abstract: A machine tool includes a fixed pillar, a finishing cutting tool with a first teeth portion, a rough cutting tool with a second teeth portion, a punching tool with a third teeth portion, and a support member passing through the punching tool, the rough cutting tool, and the finishing cutting tool and detachably mounted to the fixed pillar. The finishing cutting tool, the rough cutting tool, and the punching tool are arranged sequentially in a direction away from the fixed pillar. The outer diameter of the fixed pillar is smaller than the diameter of the finishing cutting tool. The diameter of the finishing cutting tool is greater than the diameter of the rough cutting tool. The diameter of the rough cutting tool is greater than the diameter of the punching tool. The present invention further provides a method of machining a box-end wrench by using the aforesaid machining tool.

Abstract: Semiconductor devices and methods of manufacturing are provided. In some embodiments the method includes depositing an etch stop layer over a first hard mask material, the first hard mask material over a gate stack, depositing an interlayer dielectric over the etch stop layer, forming a first opening through the interlayer dielectric, the etch stop layer, and the first hard mask material, the first opening exposing a conductive portion of the gate stack, and treating sidewalls of the first opening with a first dopant to form a first treated region within the interlayer dielectric, a second treated region within the etch stop layer, a third treated region within the first hard mask material, and a fourth treated region within the conductive portion, wherein after the treating the fourth treated region has a higher concentration of the first dopant than the first treated region.

Abstract: A bonded assembly may be formed by: providing a substrate and a semiconductor chip in a low-oxygen ambient having an oxygen partial pressure that is lower than 17 kPa; disposing the semiconductor chip on the substrate; performing a plasma treatment process on a copper-containing surface of a chip bonding pad on the semiconductor chip in the low-oxygen ambient by directing a plasma jet to the chip bonding pad; and attaching a bonding wire to the semiconductor chip and to the substrate such that a first end of the bonding wire is attached to the copper-containing surface and a second end of the bonding wire is attached to a substrate bonding pad on the substrate.

Abstract: The application provides a wireless communication method and a wireless communication device. A part of payload is pre-fetched from a host to a data buffer under a store-and-forward mode before transmission begins. When data transmission begins, the part of the payload pre-fetched in the data buffer is transmitted to an antenna. A remaining part of the payload is fetched to the data buffer under a cut-through mode for payload transmission, wherein the remaining part of the payload is sent from the data buffer to the antenna for radiation.

Abstract: Various back end of line (BEOL) layer formation techniques described herein enable reduced contact resistance, reduced surface roughness, and/or increased semiconductor device performance for BEOL layers such as interconnects and/or metallization layers.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.

Abstract: A semiconductor device structure and methods of forming the same are described. In some embodiments, the structure includes an N-type source/drain epitaxial feature disposed over a substrate, a P-type source/drain epitaxial feature disposed over the substrate, a first silicide layer disposed directly on the N-type source/drain epitaxial feature, and a second silicide layer disposed directly on the P-type source/drain epitaxial feature. The first and second silicide layers include a first metal, and the second silicide layer is substantially thicker than the first silicide layer. The structure further includes a third silicide layer disposed directly on the first silicide layer and a fourth silicide layer disposed directly on the second silicide layer. The third and fourth silicide layer include a second metal different from the first metal, and the third silicide layer is substantially thicker than the fourth silicide layer.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.

Abstract: A barrier layer is formed in a portion of a thickness of sidewalls in a recess prior to formation of an interconnect structure in the recess. The barrier layer is formed in the portion of the thickness of the sidewalls by a plasma-based deposition operation, in which a precursor reacts with a silicon-rich surface to form the barrier layer. The barrier layer is formed in the portion of the thickness of the sidewalls in that the precursor consumes a portion of the silicon-rich surface of the sidewalls as a result of the plasma treatment. This enables the barrier layer to be formed in a manner in which the cross-sectional width reduction in the recess from the barrier layer is minimized while enabling the barrier layer to be used to promote adhesion in the recess.

Abstract: A testing apparatus includes a circuit board, a probe station and a probe array. The circuit board includes a plurality of contacts. The probe station includes a platform located on the circuit board and used for carrying a device under test (DUT), and a plurality of probe holes formed on the platform and arranged in an array. The probe array includes a plurality of telescopic probes respectively linearly inserted into the probe holes. One end of each of the telescopic probes is contacted with one of the contacts, and the other end thereof is contacted with one of solder balls of the DUT. Each of the probe holes includes an elongated groove penetrating through the platform. Each of the telescopic probes is provided with a fin protruding outwardly and inserting into the elongated groove.