Patents by Inventor Chih-Ming An
Chih-Ming An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11916151Abstract: Present disclosure provides a semiconductor structure, including a semiconductor fin having a first portion and a second portion over the first portion, a first conductive region abutting a first lateral surface of the first portion and a first lateral surface of the second portion, a metal gate having a bottom portion and an upper portion, the bottom portion being between the first portion and the second portion of the semiconductor fin, and the upper portion being over the second portion of the semiconductor fin, and a first spacer between the bottom portion of the metal gate and the first conductive region. A method for manufacturing the semiconductor structure described herein is also provided.Type: GrantFiled: June 25, 2021Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chia-Ming Hsu, Yi-Jing Li, Chih-Hsin Ko, Kuang-Hsin Chen, Da-Wen Lin, Clement Hsingjen Wann
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Patent number: 11916133Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a gate structure sandwiched between and in contact with a first spacer feature and a second spacer feature, a top surface of the first spacer feature and a top surface of the second spacer feature extending above a top surface of the gate structure, a gate self-aligned contact (SAC) dielectric feature over the first spacer feature and the second spacer feature, a contact etch stop layer (CESL) over the gate SAC dielectric feature, a dielectric layer over the CESL, a gate contact feature extending through the dielectric layer, the CESL, the gate SAC dielectric feature, and between the first spacer feature and the second spacer feature to be in contact with the gate structure, and a liner disposed between the first spacer feature and the gate contact feature.Type: GrantFiled: February 21, 2022Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Li-Zhen Yu, Lin-Yu Huang, Chia-Hao Chang, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
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Patent number: 11917762Abstract: A circuit board module includes a circuit board body, a connector, a press button, a bracket, and a linkage. The connector includes a base and a rotating button rotatably disposed on the base. The press button is located away from the connector. The bracket includes a first limiting portion. The linkage is located between the rotating button and the press button and includes a second limiting portion corresponding to the first limiting portion, a first segment, and a second segment linked to the first segment. The first segment extends along a first axis and is linked to the rotating button. The second segment extends along a second axis and is linked to the press button. One of the second limiting portion and the first limiting portion extends along the first axis. The first segment is movably disposed on the bracket along the first axis.Type: GrantFiled: March 15, 2022Date of Patent: February 27, 2024Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.Inventors: Chih-Ming Lai, Yung-Shun Kao
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Patent number: 11917551Abstract: Embodiments of the present invention are drawn to methods and electronic devices capable of performing coordinate spatial reuse for wirelessly transmitting data on a channel in coordination with another wireless AP operating an overlapping BSS using the same wireless channel. The device can perform RSSI measurements and generate Per-RU RSSI reports including the RSSI measurements information for transmission to another wireless AP. The RSSI measurement can be performed by the device based on power levels detected when receiving TB PPDUs transmitted by wireless STAs responsive to trigger frames, for example. Based on the Per-RU RSSI report, a wireless AP can be configured to transmit data to an associated wireless STA without causing significant interference when another AP of the overlapping BSS is also transmitting, and can schedule frames for transmission from associated wireless STAs accordingly.Type: GrantFiled: March 30, 2021Date of Patent: February 27, 2024Assignee: MEDIATEK SINGAPORE PTE. LTD.Inventors: Yongho Seok, Gary A. Anwyl, Jianhan Liu, Kai Ying Lu, James Chih-Shi Yee, Thomas Edward Pare, Jr., James June-Ming Wang
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Patent number: 11913864Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.Type: GrantFiled: May 10, 2022Date of Patent: February 27, 2024Assignee: PIXART IMAGING INC.Inventors: Yen-Chang Chu, Cheng-Nan Tsai, Chih-Ming Sun
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Publication number: 20240062339Abstract: A photographing system and a method of image fusion are provided. The photographing system includes a plurality of camera and a controller. The cameras are configured to photograph a scene to produce a plurality of sub-images. The controller is signal-connected with the cameras to obtain the sub-images. The controller analyzes the sub-images to obtain a plurality of objects contained in the scene. After the controller establishes a Pareto set of each object, the controller splices the objects according to the Pareto sets of the objects to generate an image after fusion of the sub-images.Type: ApplicationFiled: November 23, 2022Publication date: February 22, 2024Applicant: Wistron CorporationInventors: Chih-Ming Chen, Shang-An Tsai
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Publication number: 20240061344Abstract: A method for manufacturing a lithographic mask for an integrated circuit includes performing an optical proximity correction (OPC) process to an integrated circuit mask layout to produce a corrected mask layout. The method further includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout. The method also includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout.Type: ApplicationFiled: November 1, 2023Publication date: February 22, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsu-Ting HUANG, Tung-Chin WU, Shih-Hsiang LO, Chih-Ming LAI, Jue-Chin YU, Ru-Gun LIU, Chin-Hsiang LIN
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Publication number: 20240063158Abstract: A method of making a semiconductor structure includes forming a first contact pad over an interconnect structure. The method further includes forming a second contact pad over the interconnect structure, wherein the second contact pad is electrically separated from the first contact pad. The method further includes depositing a first buffer layer over the interconnect structure, wherein the first buffer layer partially covers the second contact pad, and an edge of the second contact pad extends beyond the first buffer layer.Type: ApplicationFiled: November 2, 2023Publication date: February 22, 2024Inventors: Gulbagh SINGH, Chih-Ming LEE, Chi-Yen LIN, Wen-Chang KUO, C. C. LIU
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Patent number: 11908819Abstract: Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.Type: GrantFiled: October 12, 2022Date of Patent: February 20, 2024Assignee: Apple Inc.Inventors: Jun Chung Hsu, Chih-Ming Chung, Jun Zhai, Yifan Kao, Young Doo Jeon, Taegui Kim
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Patent number: 11906898Abstract: In a method of manufacturing a photo mask, a resist layer is formed over a mask blank, which includes a mask substrate, a phase shift layer disposed on the mask substrate and a light blocking layer disposed on the phase shift layer. A resist pattern is formed by using a lithographic operation. The light blocking layer is patterned by using the resist pattern as an etching mask. The phase shift layer is patterned by using the patterned light blocking layer as an etching mask. A border region of the mask substrate is covered with an etching hard cover, while a pattern region of the mask substrate is opened. The patterned light blocking layer in the pattern region is patterned through the opening of the etching hard cover. A photo-etching operation is performed on the pattern region to remove residues of the light blocking layer.Type: GrantFiled: August 10, 2020Date of Patent: February 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chun-Chieh Tien, Cheng-Hsuen Chiang, Chih-Ming Chen, Cheng-Ming Lin, Yen-Wei Huang, Hao-Ming Chang, Kuo-Chin Lin, Kuan-Shien Lee
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Patent number: 11904464Abstract: A three-dimensional measuring device includes a ball-shaped structure, an X-axis measuring module, a Y-axis measuring module and a Z-axis measuring module. The ball-shaped structure is moved and/or rotated in response to a movement of a movable object. The X-axis measuring module includes a first measuring structure and a first position sensor. The first measuring structure is movable along an X-axis direction and contacted with the ball-shaped structure. The Y-axis measuring module includes a second measuring structure and a second position sensor. The second measuring structure is movable along a Y-axis direction and contacted with the ball-shaped structure. The Z-axis measuring module includes a third measuring structure and a third position sensor. The third measuring structure is movable along a Z-axis direction and contacted with the ball-shaped structure.Type: GrantFiled: September 17, 2020Date of Patent: February 20, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Chi-Huan Shao, Chih-Ming Hsu, Chi-Shun Chang, Hung-Sheng Chang
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Patent number: 11903907Abstract: The invention provides a soluble honokiol derivative (such as a water soluble honokiol derivative) and its application in antagonizing glycoprotein VI receptor and providing antioxidant and neuroprotective effects.Type: GrantFiled: July 17, 2020Date of Patent: February 20, 2024Assignees: TAIPEI MEDICAL UNIVERSITY, CATHAY GENERAL HOSPITALInventors: Joen-Rong Sheu, Fa-Kung Lee, Chih-Cheng Chien, Chih-Ming Ho, Chao-Chien Chang, Cheng-Ying Hsieh, Jing-Ping Liou
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Publication number: 20240055288Abstract: A carrier board conveying box with a reinforced structure comprises a container body, two clamping parts, and at least two reinforced structures. The container body has a top plate, a bottom plate, a plurality of side plates connecting the top plate and the bottom plate and a side opening. The top plate, the bottom plate, and the side plates are clamped to form an accommodating space. Two clamping parts are respectively disposed at two opposite sides of the container body. At least two reinforced structures are respectively disposed at the two opposite sides of the container body, and each of the reinforced structures is adjacent to a position of the side opening. The carrier board conveying box with a reinforced structure solves the problem of container distortion and deformation of the container body caused by load factors because of repeatedly bearing the weight of the carrier boards during transfer.Type: ApplicationFiled: November 15, 2022Publication date: February 15, 2024Inventors: MING-CHIEN CHIU, YUNG-CHIN PAN, TZU-NING HUANG, CHIH-MING LIN
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Publication number: 20240056983Abstract: A power control method, for a first communication device, includes applying Bayesian Optimization, Causal Bayesian Optimization, or Dynamic Causal Bayesian Optimization to at least one data so as to determine a transmission power control value, and outputting the transmission power control value. The at least one data is extracted from at least one signal at least from a second communication device. The transmission power control value is configured to instruct the second communication device how to set the transmission power of the second communication device. Even if the second communication device moves fast, the second communication device is able to adjust its transmission power according to the optimized transmission power control value, thereby minimizing the power consumption of the second communication device.Type: ApplicationFiled: November 20, 2022Publication date: February 15, 2024Applicant: Wistron CorporationInventor: Chih-Ming Chen
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Publication number: 20240054874Abstract: A smoke detector includes a substrate, an optical detection module, a base and a top cover. The substrate has a ring shape region surrounding a central detection region, and a first block structure of the central detection region is protruded from the substrate and higher than an upper surface of the ring shape region. The optical detection module is disposed inside the central detection region. The base is disposed on the substrate and around the optical detection module. The base has a second block structure. The top cover is connected to the base. A lateral wall of the top cover is partly overlapped with the second block structure to form a guiding channel. The optical detection module analyzes variation of scattering parameters resulted from gaseous matter entering the top cover through the guiding channel for determining concentration of the gaseous matter.Type: ApplicationFiled: August 9, 2022Publication date: February 15, 2024Applicant: PixArt Imaging Inc.Inventors: Cheng-Nan Tsai, Yen-Chang Chu, Chih-Ming Sun
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Patent number: 11901190Abstract: A method of reducing corner rounding during patterning of a substrate to form a prescribed pattern comprising a corner includes dividing the pattern into a first pattern and a second pattern, the first pattern forming a first edge of the corner and the second pattern forming a second edge of the corner. At least a portion of the second pattern overlaps the first pattern such that the first edge intersects with the second edge to form a corner of the prescribed pattern. The method further includes forming the first pattern in a first mask layer disposed on a substrate to expose the substrate and forming the second pattern in the first mask layer to expose the substrate. The substrate exposed through the first mask layer is then etched to obtain the pattern.Type: GrantFiled: April 30, 2018Date of Patent: February 13, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chin-Yuan Tseng, Yu-Tien Shen, Wei-Liang Lin, Chih-Ming Lai, Kuo-Cheng Ching, Shi Ning Ju, Li-Te Lin, Ru-Gun Liu
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Publication number: 20240047118Abstract: A transformer includes a magnetic core assembly, a bobbin, two first windings, a second winding and at least one circuit board. The bobbin includes a bobbin main body, a bobbin channel and a winding portion. The winding portion is formed on an outer periphery surface of the bobbin main body. The two first windings are disposed around the winding portion. One of the two first windings is disposed between the other one of the two first windings and the outer periphery surface of the bobbin main body. The second winding is disposed around the winding portion and disposed between the two first windings. The at least one circuit board includes a circuit board hole. The circuit board hole and the bobbin channel are communicated with each other. The magnetic core assembly partially penetrates through the circuit board hole and the bobbin channel.Type: ApplicationFiled: November 17, 2022Publication date: February 8, 2024Inventors: Po-Sheng Wang, Hsi-Kuo Chung, Chih-Ming Chen, Hsiang-Yi Tseng, Hsi-Chen Liu
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Publication number: 20240047557Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a first dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a first conductive material and a second conductive material disposed over the semiconductor substrate and the first dielectric layer. The semiconductor device structure further includes a second dielectric layer surrounding the first conductive material and the second conductive material and an insulating structure over the semiconductor substrate. The insulating structure is disposed between the first conductive material and the second conductive material. The insulating structure comprises a material different from the first dielectric layer and the second dielectric layer.Type: ApplicationFiled: October 19, 2023Publication date: February 8, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Hsuan HSIAO, Shu-Yuan KU, Chih-Chang HUNG, I-Wei YANG, Chih-Ming SUN
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Publication number: 20240044700Abstract: An optical sensor assembly is provided. The optical sensor assembly includes a circuit board, an optical sensor positioned on the circuit board, and a front cover attached to the circuit board and covering the optical sensor. The front cover includes an optical element configured to guide or condense an incident light of a predetermined wavelength onto the optical sensor. The front cover is made of polypropylene or polyethylene. The predetermined wavelength is in a range from 8 micrometers to 12 micrometers.Type: ApplicationFiled: October 13, 2023Publication date: February 8, 2024Inventors: CHIH-MING SUN, PO-WEI YU
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Patent number: 11892382Abstract: A method of monitoring a semiconductor fabrication facility and a semiconductor fabrication facility are provided. The method includes collecting an ambient air in a clean room through a plurality of gas lines with their gas inlets arranged at a plurality of sampling positions in the clean room. The method also includes measuring a parameter of the ambient air by a plurality of metrology devices which are connected to the gas lines. At least two of the sampling positions are measured simultaneously. The method further includes issuing a warning when the parameter detected by the metrology devices is outside a range of acceptable values.Type: GrantFiled: August 27, 2021Date of Patent: February 6, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chih-Ming Tsao, Tzu-Sou Chuang
