Abstract: The present disclosure provides a semiconductor structure. The structure includes a semiconductor substrate, a gate stack over a first portion of a top surface of the semiconductor substrate; and a laminated dielectric layer over at least a portion of a top surface of the gate stack. The laminated dielectric layer includes at least a first sublayer and a second sublayer. The first sublayer is formed of a material having a dielectric constant lower than a dielectric constant of a material used to form the second sublayer and the material used to form the second sublayer has an etch selectivity higher than an etch selectivity of the material used to form the first sublayer.

Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to one embodiment includes an active region including a channel region and a source/drain region adjacent the channel region, a gate structure over the channel region of the active region, a source/drain contact over the source/drain region, a dielectric feature over the gate structure and including a lower portion adjacent the gate structure and an upper portion away from the gate structure, and an air gap disposed between the gate structure and the source/drain contact. A first width of the upper portion of the dielectric feature along a first direction is greater than a second width of the lower portion of the dielectric feature along the first direction. The air gap is disposed below the upper portion of the dielectric feature.

Abstract: An IC structure includes a fin structure, a contact overlying the fin structure along a first direction, and an isolation layer between the contact and the fin structure. The isolation layer is adjacent to a portion of the contact along a second direction perpendicular to the first direction.

Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a substrate. A gate electrode is over the substrate and a spacer structure laterally surrounds the gate electrode. A conductive via is disposed on the gate electrode. A liner is arranged along one or more sidewalls of the spacer structure. The conductive via has a bottommost surface that has a larger width than a part of the conductive via that is laterally adjacent to one or more interior sidewalls of the liner.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first insulating layer over a substrate. A first metal feature is formed in the first insulating layer and a second insulating layer is formed over the first insulating layer. A first metal via is formed through the second insulating layer to connect the first metal feature. A second metal feature is formed over the second insulating layer. The second metal feature has a convex top surface and a plane bottom surface, and the plane bottom is electrically connected to the first metal feature through the first metal via.

Abstract: A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.

Abstract: A physiological detection device includes system including a first array PPG detector, a second array PPG detector, a display and a processing unit. The first array PPG detector is configured to generate a plurality of first PPG signals. The second array PPG detector is configured to generate a plurality of second PPG signals. The display is configured to show a detected result of the physiological detection system. The processing unit is configured to convert the plurality of first PPG signals and the plurality of second PPG signals to a first 3D energy distribution and a second 3D energy distribution, respectively, and control the display to show an alert message.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.

Abstract: Method and apparatus for constrained de-blocking filter are disclosed. One method receives input data related to a current block in a current picture at a video encoder side or a video bitstream corresponding to compressed data including the current block in the current picture at a video decoder side, and determines a first boundary associated with the current block, wherein the first boundary corresponds to one vertical boundary or one horizontal boundary of the current block. The method then applies de-blocking process to a reconstructed current block corresponding to the current block to result in a filtered-reconstructed current block, using a plurality of first reference samples at a same side of the first boundary, and replaces a first set of the first reference samples by one or more padding values. The method then generates a filtered decoded picture including the filtered-reconstructed current block.

Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes a gate structure sandwiched between and in contact with a first spacer feature and a second spacer feature, a top surface of the first spacer feature and a top surface of the second spacer feature extending above a top surface of the gate structure, a gate self-aligned contact (SAC) dielectric feature over the first spacer feature and the second spacer feature, a contact etch stop layer (CESL) over the gate SAC dielectric feature, a dielectric layer over the CESL, a gate contact feature extending through the dielectric layer, the CESL, the gate SAC dielectric feature, and between the first spacer feature and the second spacer feature to be in contact with the gate structure, and a liner disposed between the first spacer feature and the gate contact feature.

Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.

Abstract: A composite material body (10) includes a first material layer (20) and a second material layer (30) overlapping the first material layer (20). The first material layer (20) and the second material layer (30) are wound to form a flexible and circular rod. Impact absorption is effectively improved and impact resisting strength is enhanced because energy-absorber or damping material or its composition is attached into the composite material body (10). Technical characteristics, effects and objects of this invention are achieved thereby.

Abstract: A composite material body (10) includes a first material layer (20) and a second material layer (30) overlapping the first material layer (20). The first material layer (20) and the second material layer (30) are wound to form a flexible and circular rod. Impact absorption is effectively improved and impact resisting strength is enhanced because energy-absorber or damping material or its composition is attached into the composite material body (10). Technical characteristics, effects and objects of this invention are achieved thereby.

Abstract: A composite material body (10) includes a first material layer (20) and a second material layer (30) overlapping the first material layer (20). The first material layer (20) and the second material layer (30) are wound to form a flexible and circular rod. Impact absorption is effectively improved and impact resisting strength is enhanced because energy-absorber or damping material or its composition is attached into the composite material body (10). Technical characteristics, effects and objects of this invention are achieved thereby.

Abstract: A composite material body (10) includes a first material layer (20) and a second material layer (30) overlapping the first material layer (20). The first material layer (20) and the second material layer (30) are wound to form a flexible and circular rod. Impact absorption is effectively improved and impact resisting strength is enhanced because energy-absorber or damping material or its composition is attached into the composite material body (10). Technical characteristics, effects and objects of this invention are achieved thereby.

Abstract: A composite material body (10) includes a first material layer (20) and a second material layer (30) overlapping the first material layer (20). The first material layer (20) and the second material layer (30) are wound to form a flexible and circular rod. Impact absorption is effectively improved and impact resisting strength is enhanced because energy-absorber or damping material or its composition is attached into the composite material body (10). Technical characteristics, effects and objects of this invention are achieved thereby.

Abstract: A composite material body (10) includes a first material layer (20) and a second material layer (30) overlapping the first material layer (20). The first material layer (20) and the second material layer (30) are wound to form a flexible and circular rod. Impact absorption is effectively improved and impact resisting strength is enhanced because energy-absorber or damping material or its composition is attached into the composite material body (10). Technical characteristics, effects and objects of this invention are achieved thereby.

Abstract: A treatment method for solid oxide fuel cells includes: measuring a radius of curvature of a cell; measuring a surface resistance of cathode current collecting layer of a cell; performing an alcohol permeating test of a cell; performing simultaneously several stages of compression and heating or cooling to a cell; an apparatus for completing above stages is also disclosed.

Abstract: A nanostructured anode of solid oxide fuel cell with high stability and high efficiency and a method for manufacturing the same are revealed. This anode comprising a porous permeable metal substrate, a diffusion barrier layer and a nano-composite film is formed by atmospheric plasma spray. The nano-composite film includes a plurality of metal nanoparticles, a plurality of metal oxide nanoparticles, and a plurality of gas pores that are connected to form nano gas channels. The metal nanoparticles are connected to form a 3-dimensional network that conducts electrons, while the metal oxide nanoparticles are connected to form a 3-dimensional network that conducts oxygen ions. The network formed by metal oxide nanoparticles has certain strength to separate metal nanoparticles and prevent aggregation or agglomeration of the metal nanoparticles. Thus this anode can be applied to a solid oxide fuel cell operating in the intermediate temperatures (600˜800° C.) with high stability and high efficiency.