Abstract: An antenna module includes a first antenna radiator including a feeding terminal, a second antenna radiator, a first ground radiator, a second ground radiator and a capacitive element. The second antenna radiator is disposed on one side of the first antenna radiator, and a first gap is formed between a main portion of the second antenna radiator and the first antenna radiator. The first ground radiator is disposed on another side of the first antenna radiator, and a second gap is formed between the first antenna radiator and the first antenna radiator. The second ground radiator is disposed between the second antenna radiator and the first ground radiator, and a third gap is formed between the second ground radiator and a first branch of the second antenna radiator. The capacitive element is disposed on the third gap and connects the second antenna radiator and the second ground radiator.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: A true random-number generator generating a random variable is provided. A first delay circuit delays an input signal to generate a first delayed signal. A second delay circuit delays the first delayed signal to generate a second delayed signal. A first sampling circuit samples the input signal according to a clock signal to generate a first sampled signal. A second sampling circuit samples the first delayed signal according to the clock signal to generate a second sampled signal. A third sampling circuit samples the second delayed signal according to the clock signal to generate a third sampled signal. An operational circuit generates the random variable and adjusts a count value according to the first sampled signal, the second sampled signal, and the third sampled signal. The operational circuit adjusts the clock signal according to the count value.

Abstract: A true random-number generator generating a random variable is provided. A first delay circuit delays an input signal to generate a first delayed signal. A second delay circuit delays the first delayed signal to generate a second delayed signal. A first sampling circuit samples the input signal according to a clock signal to generate a first sampled signal. A second sampling circuit samples the first delayed signal according to the clock signal to generate a second sampled signal. A third sampling circuit samples the second delayed signal according to the clock signal to generate a third sampled signal. An operational circuit generates the random variable and adjusts a count value according to the first sampled signal, the second sampled signal, and the third sampled signal. The operational circuit adjusts the clock signal according to the count value.

Abstract: The disclosure provides a multi-voltage chip, including a regulator circuit, a high-voltage domain controller, a low-voltage domain controller, and a digital logic circuit. The regulator circuit receives and responds to a feedback signal, a regulating start signal, and a reference voltage to convert a system high voltage into a regulated voltage. The high-voltage domain controller receives a power signal and the system high voltage to provide the reference voltage and the regulating start signal. The low-voltage domain controller is coupled to the high-voltage domain controller and receives the regulated voltage to provide a system start signal in response to the regulating start signal. The digital logic circuit is coupled to the regulator circuit to receive the regulated voltage and provide the feedback signal, and is coupled to the low-voltage domain controller to operate in response to the system start signal.

Abstract: The disclosure provides a multi-voltage chip, including a regulator circuit, a high-voltage domain controller, a low-voltage domain controller, and a digital logic circuit. The regulator circuit receives and responds to a feedback signal, a regulating start signal, and a reference voltage to convert a system high voltage into a regulated voltage. The high-voltage domain controller receives a power signal and the system high voltage to provide the reference voltage and the regulating start signal. The low-voltage domain controller is coupled to the high-voltage domain controller and receives the regulated voltage to provide a system start signal in response to the regulating start signal. The digital logic circuit is coupled to the regulator circuit to receive the regulated voltage and provide the feedback signal, and is coupled to the low-voltage domain controller to operate in response to the system start signal.

Abstract: The disclosure is related to a blind without pull cord and an angle adjustment device thereof, wherein the angle adjustment device is configured to adjust angles of slats of a blind and includes at least one adjustment assembly and a shaft. The at least one adjustment assembly includes a mount base, a string pulley, a first gear and a first string. The string pulley is pivotably disposed on the mount base. The first gear is fixed on the string pulley. The first string is installed on the string pulley and is configured to connect the slats. The shaft includes a lengthy part and at least one outer tooth fixed on the lengthy part, wherein the at least one outer tooth is engaged with the first gear. An axis of the first gear is perpendicular to an axis of the shaft.

Abstract: A method of manufacturing a semiconductor device includes receiving a FinFET precursor including a fin structure formed between some isolation regions, and a gate structure formed over a portion of the fin structure; removing a top portion of the fin structure on either side of the gate structure; growing a semiconductive layer on top of a remaining portion of the fin structure such that a plurality of corners is formed over the fin structure; forming a capping layer over the semiconductive layer; performing an annealing process on the FinFET precursor to form a plurality of dislocations proximate to the corners; and removing the capping layer.

Abstract: A tilt mechanism for a blind includes a spool, two transmission shafts, two transmission sleeves and a driven shaft. The spool has an inner gear. Each transmission shaft has an assembling portion and a gear. The gears are engaged with the inner gear. The transmission sleeves are respectively engaged with the assembling portions of the transmission shafts, and each transmission sleeve has an outer surface and a worm gear located at the outer surface thereof. The driven shaft has a teeth portion, and the teeth portion is engaged with the worm gear. The transmission shafts and the transmission sleeves are simultaneously rotatable by being driven by the spool, and the driven shaft is rotatable between a start position and a stop position along an operating direction by being driven by the transmission sleeves.

Abstract: A tilt mechanism for a blind includes a spool, two transmission shafts, two transmission sleeves and a driven shaft. The spool has an inner gear. Each transmission shaft has an assembling portion and a gear. The gears are engaged with the inner gear. The transmission sleeves are respectively engaged with the assembling portions of the transmission shafts, and each transmission sleeve has an outer surface and a worm gear located at the outer surface thereof. The driven shaft has a teeth portion, and the teeth portion is engaged with the worm gear. The transmission shafts and the transmission sleeves are simultaneously rotatable by being driven by the spool, and the driven shaft is rotatable between a start position and a stop position along an operating direction by being driven by the transmission sleeves.

Abstract: A method of manufacturing a semiconductor device includes receiving a FinFET precursor including a fin structure formed between some isolation regions, and a gate structure formed over a portion of the fin structure; removing a top portion of the fin structure on either side of the gate structure; growing a semiconductive layer on top of a remaining portion of the fin structure such that a plurality of corners is formed over the fin structure; forming a capping layer over the semiconductive layer; performing an annealing process on the FinFET precursor to form a plurality of dislocations proximate to the corners; and removing the capping layer.

Abstract: Some embodiments of the present disclosure provide a method of manufacturing a semiconductor device including receiving a FinFET precursor including a fin structure formed between isolation regions, and a gate structure formed over a portion of the fin structure such that a sidewall of the fin structure is in contact with a gate spacer of the gate structure; patterning the fin structure to comprise a pattern of at least one upward step rising from the isolation region; forming a capping layer over the fin structure, the isolation region, and the gate structure; performing an annealing process on the FinFET precursor to form at least two dislocations along the upward step; and removing the capping layer.

Abstract: Some embodiments of the present disclosure provide a method of manufacturing a semiconductor device including receiving a FinFET precursor including a fin structure formed between isolation regions, and a gate structure formed over a portion of the fin structure such that a sidewall of the fin structure is in contact with a gate spacer of the gate structure; patterning the fin structure to comprise a pattern of at least one upward step rising from the isolation region; forming a capping layer over the fin structure, the isolation region, and the gate structure; performing an annealing process on the FinFET precursor to form at least two dislocations along the upward step; and removing the capping layer.

Abstract: A facsimile machine includes a receiving unit, a processing unit and a sending unit. The receiving unit receives facsimile data from a facsimile sending machine over a telephone network. The processing unit extracts a source identification number from the facsimile data and determines whether the source identification number matches one of a plurality of predetermined identification numbers. If the source identification number matches one of the predetermined identification numbers, the sending unit sends the facsimile data to a destination facsimile machine associated with a destination facsimile number over the telephone network.

Abstract: A system for cleaning a wafer. At least one first chuck roller is connected to a first roller base and includes a first annular groove. A second roller base opposes the first roller base. At least one second chuck roller is connected to the second roller base and includes a second annular groove. A sensing chuck roller is connected to the second roller base and includes a third annular groove corresponding to the first and second annular grooves. A cleaning member covers the third annular groove. A circumferential edge of the wafer is positioned in the first and second annular grooves and abuts the cleaning member. The first and second chuck rollers rotate the wafer, enabling the circumferential edge thereof to rub against the cleaning member.

Abstract: A method for recycling a used sputtering target is provided, including the steps of: (1) cleaning, (2) pulverization, (3) dissolution, (4) filtering, (5) peptization, (6) neutralization and precipitation, (7) rinsing and filtering, (8) drying, and (9) calcination; through the steps above, which can then be recycling used sputtering target to recover the constituent components of the ITO targets.

Abstract: A system for cleaning a wafer. At least one first chuck roller is connected to a first roller base and includes a first annular groove. A second roller base opposes the first roller base. At least one second chuck roller is connected to the second roller base and includes a second annular groove. A sensing chuck roller is connected to the second roller base and includes a third annular groove corresponding to the first and second annular grooves. A cleaning member covers the third annular groove. A circumferential edge of the wafer is positioned in the first and second annular grooves and abuts the cleaning member. The first and second chuck rollers rotate the wafer, enabling the circumferential edge thereof to rub against the cleaning member.

Abstract: A method of manufacturing sputtering targets comprises the following steps of: 1. wet milling: mixing and grinding indium-tin oxide (ITO) powders, a sintering aid agent, a binder agent, and additive agent by wet milling method; 2. granulation: drying the mixed and grinded mixtures to form granulated ITO powers; 3. shaping: granulated ITO powders into rough-shaped green bodies by using dry pressing; 4. strengthening: strengthening the rough-shaped green bodies by using the cold isostatic pressing; 5. dewaxing: putting rough-shaped green bodies into a high-temperature furnace to remove the additive agent so as to obtain dewaxed green bodies; and 6. sintering: putting the dewaxed green bodies into an controlled atmosphere furnace and sintering the dewaxed green bodies at a gas pressure ranged from 1.1 atm to 1.9 atm. By using the above-mentioned steps, the high-density ITO sputtering targets are obtained.

Abstract: A wireless communication system, a method and a computer readable medium thereof for maintaining communication in an interference environment are provided. The wireless communication system comprises a selection and distribution device and a terminal device which communicate by a beacon. The beacon comprises a definition of an active period and an inactive period. The method comprises the steps of: the selection and distribution device and the terminal device using a first channel in the active period to communicate initially; and the selection and distribution device using a second channel in the inactive period to communicate with the terminal device if the first channel is interfered.