Patents by Inventor Chih-Ming Shen

Chih-Ming Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12007902
    Abstract: The invention provides a configurable memory system including an interface layer, an overlay application layer, and a memory relocatable layer. The interface layer has a physical memory attribute module and a physical memory protection module. The interface layer manages memory attributes and memory security. The overlay application layer is coupled to the interface layer and executes an exception handler process to check if an overlay exception has occurred. The memory relocatable layer, coupled to the interface layer and the overlay application layer, having a plurality of resident service program within a first memory space, an overlay physical region within a second memory space, and a plurality of overlay virtual regions having application processes within a third memory space. The application processes of one of the overlay virtual regions is determined to be executed by the PMA module and is copied from the overlay virtual region to the overlay physical region by a processor.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: June 11, 2024
    Assignee: ANDES TECHNOLOGY CORPORATION
    Inventors: Chih-Ming Shen, Cheng-Yen Huang
  • Publication number: 20240152463
    Abstract: The invention provides a configurable memory system including an interface layer, an overlay application layer, and a memory relocatable layer. The interface layer has a physical memory attribute module and a physical memory protection module. The interface layer manages memory attributes and memory security. The overlay application layer is coupled to the interface layer and executes an exception handler process to check if an overlay exception has occurred. The memory relocatable layer, coupled to the interface layer and the overlay application layer, having a plurality of resident service program within a first memory space, an overlay physical region within a second memory space, and a plurality of overlay virtual regions having application processes within a third memory space. The application processes of one of the overlay virtual regions is determined to be executed by the PMA module and is copied from the overlay virtual region to the overlay physical region by a processor.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Applicant: ANDES TECHNOLOGY CORPORATION
    Inventors: Chih-Ming Shen, Cheng-Yen Huang
  • Patent number: 11508877
    Abstract: A red light emitting diode including an epitaxial stacked layer, a first and a second electrodes and a first and a second electrode pads is provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and a light emitting layer. A main light emitting wavelength of the light emitting layer falls in a red light range. The epitaxial stacked layer has a first side adjacent to the first semiconductor layer and a second side adjacent to the second semiconductor layer. The first and the second electrodes are respectively electrically connected to the first-type and the second-type semiconductor layers, and respectively located to the first and the second sides. The first and a second electrode pads are respectively disposed on the first and the second electrodes and respectively electrically connected to the first and the second electrodes. The first and the second electrode pads are located at the first side of the epitaxial stacked layer.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: November 22, 2022
    Assignee: Genesis Photonics Inc.
    Inventors: Tung-Lin Chuang, Yi-Ru Huang, Yu-Chen Kuo, Chih-Ming Shen, Tsung-Syun Huang, Jing-En Huang
  • Patent number: 11393955
    Abstract: A light emitting diode (LED) including an epitaxial stacked layer, first and second reflective layers which are disposed at two sides of the epitaxial stacked layer, a current conducting layer and first and second electrodes and a manufacturing thereof are provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and an active layer. A main light emitting surface with a light transmittance >0% and ?10% is formed on one of the two reflective layers. The current conducting layer contacts the second-type semiconductor layer. The first electrode is electrically connected to the first-type semiconductor layer. The second electrode is electrically connected to the second-type semiconductor layer via the current conducting layer. A contact scope of the current conducting layer and the second-type semiconductor layer is served as a light-emitting scope overlapping the two layers, but not overlapping the two electrodes.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: July 19, 2022
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Kai-Shun Kang, Tung-Lin Chuang, Yu-Chen Kuo, Yan-Ting Lan, Chih-Ming Shen, Jing-En Huang
  • Publication number: 20220201870
    Abstract: A fabrication method of a flexible electronic package device including the following steps is provided. A tolerable bending radius of the flexible electronic package device is obtained. A minimum surface curvature radius of a selected portion of an applied carrier is obtained. A relationship of the tolerable bending radius being smaller than the minimum surface curvature radius is ensured. The flexible electronic package device is disposed on the selected portion.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Chien-Min Hsu, Chih-Ming Shen, Shih-Hsien Wu
  • Patent number: 11363724
    Abstract: A fabrication method of a flexible electronic package device including the following steps is provided. A tolerable bending radius of the flexible electronic package device is obtained. A minimum surface curvature radius of a selected portion of an applied carrier is obtained. A relationship of the tolerable bending radius being smaller than the minimum surface curvature radius is ensured. The flexible electronic package device is disposed on the selected portion.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: June 14, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Min Hsu, Chih-Ming Shen, Shih-Hsien Wu
  • Patent number: 11342488
    Abstract: A light emitting diode chip including an epitaxy stacked layer, first and second electrodes and a first reflective layer is provided. The epitaxy stacked layer includes first-type and second-type semiconductor layers and a light-emitting layer. The first and second electrodes are respectively electrically connected to the first-type and second-type semiconductor layers. An orthogonal projection of the light-emitting layer on the first-type semiconductor layer is misaligned with an orthogonal projection of the first electrode on the first-type semiconductor layer. The first reflective layer is disposed on the epitaxy stacked layer, the first and second electrodes. An orthogonal projection of the first reflective layer on the second-type semiconductor layer is misaligned with an orthogonal projection of the second electrode on the second-type semiconductor layer. Furthermore, a light emitting diode device is also provided.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: May 24, 2022
    Assignee: Genesis Photonics Inc.
    Inventors: Tung-Lin Chuang, Yi-Ru Huang, Yu-Chen Kuo, Yan-Ting Lan, Chih-Ming Shen, Jing-En Huang
  • Patent number: 11243520
    Abstract: A human-machine interface (HMI) system comprises a local operation device, a display device, a HMI display control device and a communication control device. The local operation device generates a local operation signal. The display device shows a display image corresponding to a display signal. The HMI display control device generates the display signal according to the local operation signal or a remote operation signal. The communication control device comprises a wireless communication connection port for connecting with a remote operation device. The communication control device transmits the local operation signal to the HMI display control device, transmits the display signal to the display device, and selectively transmits the display signal to the remote operation device.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: February 8, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih Chung Chiu, Chih Ming Shen, Ming Ji Dai
  • Patent number: 11239146
    Abstract: A package structure is provided. The package structure includes a substrate. The package structure also includes a hybrid pad disposed on the substrate. The hybrid pad includes a metal layer and a buffer layer connected to the metal layer. The Young's modulus of the buffer layer is less than the Young's modulus of the metal layer. The package structure further includes an electrically connecting structure disposed on the hybrid pad. The package structure includes a chip layer electrically connected to the electrically connecting structure. The package structure also includes a bonding pad disposed between the electrically connecting structure and the chip layer.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: February 1, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Min Hsu, Chih-Ming Shen
  • Patent number: 11239141
    Abstract: A lead frame package including first conductive layer, first electronic component, lead frames, second conductive layer and package body. First conductive layer has conductive carriers. First electronic component has first pins. Lead frames and first pins are respectively electrically connected to conductive carriers. Second conductive layer has conductive joints respectively electrically connected to lead frames so as to be electrically connected to at least a part of conductive carriers via lead frames. Package body encapsulates first conductive layer, first electronic component, and lead frames. First conductive layer and second conductive layer are located on two opposite sides of first electronic component, respectively.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: February 1, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ren-Shin Cheng, Shih-Hsien Wu, Yu-Wei Huang, Chih Ming Shen, Yi-Chieh Tsai
  • Publication number: 20220005754
    Abstract: A lead frame package including first conductive layer, first electronic component, lead frames, second conductive layer and package body. First conductive layer has conductive carriers. First electronic component has first pins. Lead frames and first pins are respectively electrically connected to conductive carriers. Second conductive layer has conductive joints respectively electrically connected to lead frames so as to be electrically connected to at least a part of conductive carriers via lead frames. Package body encapsulates first conductive layer, first electronic component, and lead frames. First conductive layer and second conductive layer are located on two opposite sides of first electronic component, respectively.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 6, 2022
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ren-Shin CHENG, Shih-Hsien WU, Yu-Wei HUANG, Chih Ming SHEN, Yi-Chieh TSAI
  • Patent number: 11132786
    Abstract: A board defect filtering method is provided. The method includes: receiving a defect list; obtaining a plurality of defect images of a plurality of defect records on the defect list; receiving a circuit layout image; analyzing a defect location of a first defect image of the plurality of defect images according to the circuit layout image; cropping the first defect image to obtain a first cropped defect image according to the defect location; inputting the first cropping defect image to a defect classifying model; and determining whether the first defect image is a qualified product image or not according to an output result of the defect classifying model.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: September 28, 2021
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Kaan Liang, An-Chun Luo, Yu-Shan Deng, Chih-Ming Shen, Ming-Ji Dai
  • Publication number: 20210202367
    Abstract: A package structure is provided. The package structure includes a substrate. The package structure also includes a hybrid pad disposed on the substrate. The hybrid pad includes a metal layer and a buffer layer connected to the metal layer. The Young's modulus of the buffer layer is less than the Young's modulus of the metal layer. The package structure further includes an electrically connecting structure disposed on the hybrid pad. The package structure includes a chip layer electrically connected to the electrically connecting structure. The package structure also includes a bonding pad disposed between the electrically connecting structure and the chip layer.
    Type: Application
    Filed: July 8, 2020
    Publication date: July 1, 2021
    Inventors: Chien-Min HSU, Chih-Ming SHEN
  • Publication number: 20200357955
    Abstract: A red light emitting diode including an epitaxial stacked layer, a first and a second electrodes and a first and a second electrode pads is provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and a light emitting layer. A main light emitting wavelength of the light emitting layer falls in a red light range. The epitaxial stacked layer has a first side adjacent to the first semiconductor layer and a second side adjacent to the second semiconductor layer. The first and the second electrodes are respectively electrically connected to the first-type and the second-type semiconductor layers, and respectively located to the first and the second sides. The first and a second electrode pads are respectively disposed on the first and the second electrodes and respectively electrically connected to the first and the second electrodes. The first and the second electrode pads are located at the first side of the epitaxial stacked layer.
    Type: Application
    Filed: March 23, 2020
    Publication date: November 12, 2020
    Applicant: Genesis Photonics Inc.
    Inventors: Tung-Lin Chuang, Yi-Ru Huang, Yu-Chen Kuo, Chih-Ming Shen, Tsung-Syun Huang, Jing-En Huang
  • Publication number: 20200274027
    Abstract: A light emitting diode and manufacturing method thereof are provided. The light emitting diode includes a first-type semiconductor layer, a light emitting layer, a second-type semiconductor layer, a first metal layer, a first current conducting layer, a first bonding layer and a second current conducting layer. The light emitting layer is located between the first-type semiconductor layer and the second-type semiconductor layer. The first metal layer is located on and electrically connected to the first-type semiconductor layer. The first metal layer is located between the first current conducting layer and the first-type semiconductor layer. The first current conducting layer is located between the first bonding layer and the first metal layer. The first current conducting layer is connected to the first-type semiconductor layer by the first current conducting layer and the first metal layer. The first bonding layer has through holes overlapped with the first metal layer.
    Type: Application
    Filed: February 17, 2020
    Publication date: August 27, 2020
    Applicant: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Yu-Chen Kuo, Sheng-Tsung Hsu, Chih-Ming Shen, Yao-Tang Li, Tung-Lin Chuang, Tsung-Syun Huang, Jing-En Huang
  • Patent number: 10734551
    Abstract: The invention provides an LED including a first-type semiconductor layer, an emitting layer, a second-type semiconductor layer, a first electrode, a second electrode, a Bragg reflector structure, a conductive layer and insulation patterns. The first electrode and the second electrode are located on the same side of the Bragg reflector structure. The conductive layer is disposed between the Bragg reflector structure and the second-type semiconductor layer. The insulation patterns are disposed between the conductive layer and the second-type semiconductor layer. Each insulating layer has a first surface facing toward the second-type semiconductor layer, a second surface facing away from the second-type semiconductor layer, and an inclined surface. The inclined surface connects the first surface and the second surface and is inclined with respect to the first surface and the second surface.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: August 4, 2020
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Yan-Ting Lan, Sheng-Tsung Hsu, Chih-Ming Shen, Jing-En Huang, Teng-Hsien Lai, Hung-Chuan Mai, Kuan-Chieh Huang, Shao-Ying Ting, Cheng-Pin Chen, Wei-Chen Chien, Chih-Chin Cheng, Chih-Hung Tseng
  • Publication number: 20200220050
    Abstract: A light emitting diode (LED) including an epitaxial stacked layer, first and second reflective layers which are disposed at two sides of the epitaxial stacked layer, a current conducting layer and first and second electrodes and a manufacturing thereof are provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and an active layer. A main light emitting surface with a light transmittance >0% and ?10% is formed on one of the two reflective layers. The current conducting layer contacts the second-type semiconductor layer. The first electrode is electrically connected to the first-type semiconductor layer. The second electrode is electrically connected to the second-type semiconductor layer via the current conducting layer. A contact scope of the current conducting layer and the second-type semiconductor layer is served as a light-emitting scope overlapping the two layers, but not overlapping the two electrodes.
    Type: Application
    Filed: December 6, 2019
    Publication date: July 9, 2020
    Applicant: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Kai-Shun Kang, Tung-Lin Chuang, Yu-Chen Kuo, Yan-Ting Lan, Chih-Ming Shen, Jing-En Huang
  • Patent number: 10672677
    Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor chip, a guard ring, a gel layer, and a first lead frame. The guard ring is disposed on the semiconductor chip, and the gel layer is disposed on the guard ring. The first lead frame is electrically connected to the semiconductor chip, and the gel layer is located between the guard ring and the first lead frame.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: June 2, 2020
    Assignees: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, WIN-HOUSE ELECTRONIC CO., LTD.
    Inventors: Jing-Yao Chang, Tao-Chih Chang, Kuo-Shu Kao, Fang-Jun Leu, Hsin-Han Lin, Chih-Ming Tzeng, Hsiao-Ming Chang, Chih-Ming Shen
  • Publication number: 20200110392
    Abstract: A human-machine interface (HMI) system comprises a local operation device, a display device, a HMI display control device and a communication control device. The local operation device generates a local operation signal. The display device shows a display image corresponding to a display signal. The HMI display control device generates the display signal according to the local operation signal or a remote operation signal. The communication control device comprises a wireless communication connection port for connecting with a remote operation device. The communication control device transmits the local operation signal to the HMI display control device, transmits the display signal to the display device, and selectively transmits the display signal to the remote operation device.
    Type: Application
    Filed: July 26, 2019
    Publication date: April 9, 2020
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih Chung CHIU, Chih Ming SHEN, Ming Ji DAI
  • Patent number: 10608144
    Abstract: Provided is a light emitting diode (LED) mounted on a carrier substrate and including a semiconductor epitaxial structure and at least one electrode pad structure. The semiconductor epitaxial structure is electrically connected to the carrier substrate. The electrode pad structure includes a eutectic layer, a barrier layer and a ductility layer. The eutectic layer is adapted for eutectic bonding to the carrier substrate. The barrier layer is between the eutectic layer and the semiconductor epitaxial structure. The barrier layer blocks the diffusion of the material of the eutectic layer in the eutectic bonding process. The ductility layer is between the eutectic layer and the semiconductor epitaxial structure. The ductility layer reduces the stress on the LED produced by thermal expansion and contraction of the substrate during the eutectic bonding process, so as to prevent the electrode pad structure from cracking, and maintain the quality of the LED.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: March 31, 2020
    Assignee: Genesis Photonics Inc.
    Inventors: Yi-Ru Huang, Tung-Lin Chuang, Chih-Ming Shen, Sheng-Tsung Hsu, Kuan-Chieh Huang, Jing-En Huang, Shao-Ying Ting