Patents by Inventor Chih-Ming Tsai

Chih-Ming Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240118141
    Abstract: The present invention discloses a wearable device with combined sensing capabilities, which includes a wearable assembly and at least one multi-function sensor module. The wearable assembly is suitable to be worn on apart of a user's body. The wearable assembly includes at least one light-transmissible window. The multi-function sensor module is located inside the wearable assembly, for performing an image sensing function and an infrared temperature sensing function. The multi-function sensor module includes an image sensor module for sensing a physical or a biological feature of an object through the light-transmissible window by way of image sensing; and an infrared temperature sensor module for sensing temperature through the light-transmissible window by way of infrared temperature sensing.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 11, 2024
    Inventors: Chih-Ming Sun, Ming-Han Tsai
  • Publication number: 20240095439
    Abstract: Disclosed are semiconductor devices having an interconnection pattern that includes a plurality of parallel conductors including a first conductor aligned with a first axis and a first dummy pattern aligned with a second axis on a first side of the first axis and offset from the first axis by an axis offset distance LAO in which the first dummy pattern includes N dummy conductors having a first dummy conductor length LDC with the dummy conductors being separated by a dummy conductor-to-dummy conductor spacing EED.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Inventors: Wei-Yi HU, Chih-Ming CHAO, Jung-Chou TSAI
  • Patent number: 11931187
    Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 19, 2024
    Assignees: Chang Gung Medical Foundation Chang Gung Memorial Hospital at Keelung, Chang Gung Memorial Hospital, Linkou, Chang Gung University
    Inventors: Jiun-Jie Wang, Yi-Hsin Weng, Shu-Hang Ng, Jur-Shan Cheng, Yi-Ming Wu, Yao-Liang Chen, Wey-Yil Lin, Chin-Song Lu, Wen-Chuin Hsu, Chia-Ling Chen, Yi-Chun Chen, Sung-Han Lin, Chih-Chien Tsai
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240090053
    Abstract: In one example in accordance with the present disclosure, an electronic device is described. The electronic device includes a wireless controller. The wireless controller is to establish a first wireless connection between the electronic device and a peripheral device to receive a unique identifier for a second electronic device. The wireless controller is also to establish, based on the unique identifier for the second electronic device, a second wireless connection between the electronic device and the second electronic device. The electronic device includes a wireless transceiver to wirelessly transfer data to the second electronic device through the second wireless connection.
    Type: Application
    Filed: February 2, 2021
    Publication date: March 14, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Chung-Chun Chen, Chen-Hui Lin, Chih-Ming Huang, Ming-Shien Tsai
  • Patent number: 11930174
    Abstract: A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: March 12, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Tzu-Der Chuang, Chih-Wei Hsu, Ching-Yeh Chen, Zhi-Yi Lin
  • Publication number: 20240078887
    Abstract: There is provided a smoke detector including a first light source, a second light source surface, a light sensor and a processor. The light sensor receives reflected light when the first light source and the second light source emit light, and generates a first detection signal corresponding to light emission of the first light source and a second detection signal corresponding to light emission of the second light source. The processor distinguishes smoke and floating particles according to a similarity between the first detection signal and the second detection signal.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 7, 2024
    Inventors: CHENG-NAN TSAI, GUO-ZHEN WANG, CHING-KUN CHEN, YEN-CHANG CHU, CHIH-MING SUN
  • Publication number: 20240079268
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Kuo-Ming Wu, Sheng-Chan Li
  • Patent number: 11924444
    Abstract: Method and apparatus for constrained de-blocking filter are disclosed. One method receives input data related to a current block in a current picture at a video encoder side or a video bitstream corresponding to compressed data including the current block in the current picture at a video decoder side, and determines a first boundary associated with the current block, wherein the first boundary corresponds to one vertical boundary or one horizontal boundary of the current block. The method then applies de-blocking process to a reconstructed current block corresponding to the current block to result in a filtered-reconstructed current block, using a plurality of first reference samples at a same side of the first boundary, and replaces a first set of the first reference samples by one or more padding values. The method then generates a filtered decoded picture including the filtered-reconstructed current block.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 5, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Patent number: 11918329
    Abstract: A physiological detection device includes system including a first array PPG detector, a second array PPG detector, a display and a processing unit. The first array PPG detector is configured to generate a plurality of first PPG signals. The second array PPG detector is configured to generate a plurality of second PPG signals. The display is configured to show a detected result of the physiological detection system. The processing unit is configured to convert the plurality of first PPG signals and the plurality of second PPG signals to a first 3D energy distribution and a second 3D energy distribution, respectively, and control the display to show an alert message.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: March 5, 2024
    Assignee: PIXART IMAGING INC.
    Inventors: Chiung-Wen Lin, Wei-Ru Han, Yang-Ming Chou, Cheng-Nan Tsai, Ren-Hau Gu, Chih-Yuan Chuang
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 11913864
    Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: February 27, 2024
    Assignee: PIXART IMAGING INC.
    Inventors: Yen-Chang Chu, Cheng-Nan Tsai, Chih-Ming Sun
  • Patent number: 11916282
    Abstract: An antenna apparatus includes a feeding antenna inside an electronic device and one or more antenna elements, such as a floating metal antenna, disposed on a rear cover of the electronic device. The floating metal antenna and a feeding antenna inside the electronic device may form a coupling antenna structure. The feeding antenna may be an antenna fastened on an antenna support (which may be referred to as a support antenna). The feeding antenna may alternatively be a slot antenna formed by slitting on a metal middle frame of the electronic device. The antenna apparatus may be implemented in limited design space, thereby effectively saving antenna design space inside the electronic device. The antenna apparatus may generate excitation of a plurality of resonance modes, so that antenna bandwidth and radiation characteristics can be improved.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: February 27, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Pengfei Wu, Chien-Ming Lee, Dong Yu, Chih Yu Tsai, Chih-Hua Chang, Arun Sowpati
  • Patent number: 11204242
    Abstract: A measurement system is provided, including a measurement machine and a computer. The measurement machine is configured to measure a thickness T1 of a to-be-tested circuit board and a drilling depth D1 of the to-be-tested circuit board. The computer calculates a length S1 of a residual conductive portion in a back drilled hole of the to-be-tested circuit board according to a thickness T of a reference circuit board, a drilling depth D of the reference circuit board, a length S of a residual conductive portion in a back drilled hole of the reference circuit board, the thickness T1 of the to-be-tested circuit board and the drilling depth D1 of the to-be-tested circuit board.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: December 21, 2021
    Assignee: Gold Circuit Electronics Ltd.
    Inventors: Tien-Chieh Kang, Chih-Ming Tsai
  • Publication number: 20210356264
    Abstract: A measurement system is provided, including a measurement machine and a computer. The measurement machine is configured to measure a thickness T1 of a to-be-tested circuit board and a drilling depth D1 of the to-be-tested circuit board. The computer calculates a length S1 of a residual conductive portion in a back drilled hole of the to-be-tested circuit board according to a thickness T of a reference circuit board, a drilling depth D of the reference circuit board, a length S of a residual conductive portion in a back drilled hole of the reference circuit board, the thickness T1 of the to-be-tested circuit board and the drilling depth D1 of the to-be-tested circuit board.
    Type: Application
    Filed: September 2, 2020
    Publication date: November 18, 2021
    Applicant: Gold Circuit Electronics Ltd.
    Inventors: Tien-Chieh Kang, Chih-Ming Tsai
  • Patent number: 10673104
    Abstract: A method is provided for testing a semi-finished battery cell. The semi-finished battery cell is charged with a constant current when a voltage difference between the first conductor and the second conductor is less than a voltage threshold. The semi-finished battery cell is charged with a constant voltage when the voltage difference between the first conductor and the second conductor is equal to or larger than the voltage threshold. An overall electric quantity is obtained after a default time period, wherein the overall electric quantity is an electric quantity charged to the semi-finished battery cell with the constant current during the default time period. Accordingly, an insulation related to electrodes of the semi-finished battery cell is determined as poor when the overall electric quantity is larger than an electric quantity threshold.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: June 2, 2020
    Assignee: CHROMA ATE INC.
    Inventors: Chih-Ming Tsai, Chao-Hsu Chen, Han-Chou Liao, Chung-Yu Siang
  • Publication number: 20180323481
    Abstract: A method is provided for testing a semi-finished battery cell. The semi-finished battery cell is charged with a constant current when a voltage difference between the first conductor and the second conductor is less than a voltage threshold. The semi-finished battery cell is charged with a constant voltage when the voltage difference between the first conductor and the second conductor is equal to or larger than the voltage threshold. An overall electric quantity is obtained after a default time period, wherein the overall electric quantity is an electric quantity charged to the semi-finished battery cell with the constant current during the default time period. Accordingly, an insulation related to electrodes of the semi-finished battery cell is determined as poor when the overall electric quantity is larger than an electric quantity threshold.
    Type: Application
    Filed: March 5, 2018
    Publication date: November 8, 2018
    Applicant: CHROMA ATE INC.
    Inventors: Chih-Ming TSAI, Chao-Hsu CHEN, Han-Chou LIAO, Chung-Yu SIANG
  • Publication number: 20180031637
    Abstract: A battery testing device includes a power supply, a voltmeter, a galvanometer, a differential circuit and an analyzer. The power supply is configured to provide a constant-current signal or a constant-voltage signal to a subject battery. The voltmeter is configured to detect a voltage waveform generated by the subject battery when the power supply provides the constant-current signal to the subject battery. When a voltage value of the voltage waveform achieves a threshold voltage value, the power supply switches to provide the constant-voltage signal to the subject battery. The galvanometer is configured to detect a current waveform generated by the subject battery. The differential circuit processes the voltage waveform and the current waveform by a second-order differential. The analyzer determines a testing result of the subject battery according to the processed voltage waveform and the processed current waveform.
    Type: Application
    Filed: May 17, 2017
    Publication date: February 1, 2018
    Inventor: Chih-Ming TSAI
  • Patent number: 9562928
    Abstract: An active probe pod used in a logic analyzer is disclosed. The active probe pod may be connected to the logic analyzer having a FPGA decoder and to a DUT circuit board. The active probe pod may include a LVDS differential ire component connected to the FPGA decoder and a front-end circuit board for capturing a weak signal input from the DUT circuit board. The front-end circuit board is adapted not to transmit the captured weak signal input over a long-distance signal transmission path, which helps minimize interferences with the weak signal input, while outputting a LVDS differential signal to the FPGA decoder for decoding. As the front-end circuit board is used for capturing the weak signal input, which falls within the category of one short-distance signal transmission, the signal reflection may not take place, without affecting the signal quality and/or attenuating the signal strength.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: February 7, 2017
    Assignee: ZEROPLUS TECHNOLOGY CO., LTD.
    Inventors: Chiu-Hao Cheng, Chih-Ming Tsai