Patents by Inventor Chih-Ning Chen

Chih-Ning Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250040235
    Abstract: A method for manufacturing an integrated circuit device is provided. The method includes depositing an epitaxial stack comprising alternative first and second semiconductor layers over a semiconductor substrate; patterning the epitaxial stack to form first and second semiconductor fins; removing the first semiconductor layers in the first and second semiconductor fins, while leaving a first set of the second semiconductor layers in the first semiconductor fin and a second set of the second semiconductor layers in the second semiconductor fin; forming a gate dielectric layer around the first and second sets of the second semiconductor layers; depositing a gate metal layer over the gate dielectric layer; etching a recess in the gate metal layer and between the first and second sets of the second semiconductor layers, wherein the gate metal layer has a first portion below the recess; and forming a dielectric feature in the recess.
    Type: Application
    Filed: July 25, 2023
    Publication date: January 30, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Guan-Lin Chen, Kuo-Cheng Chiang, Jung-Chien Cheng, Shi Ning Ju, Chih-Hao Wang
  • Patent number: 12205998
    Abstract: A device includes a substrate. A first channel region of a first transistor overlies the substrate and a source/drain region is in contact with the first channel region. The source/drain region is adjacent to the first channel region along a first direction, and the source/drain region has a first surface opposite the substrate and side surfaces extending from the first surface. A dielectric fin structure is adjacent to the source/drain region along a second direction that is transverse to the first direction, and the dielectric fin structure has an upper surface, a lower surface, and an intermediate surface that is disposed between the upper and lower surfaces. A silicide layer is disposed on the first surface and the side surfaces of the source/drain region and on the intermediate surface of the dielectric fin structure.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: January 21, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Cheng Chen, Zhi-Chang Lin, Jung-Hung Chang, Chien-Ning Yao, Tsung-Han Chuang, Kuo-Cheng Chiang, Chih-Hao Wang
  • Publication number: 20240195287
    Abstract: A power converter having an overvoltage protection mechanism is provided. A node between a second terminal of the high-side switch and a first terminal of a low-side switch is connected to an inductor. When an output current or an output voltage of the power converter must be released, the output current of the power converter flows to the input power source sequentially through the inductor, the high-side switch being turned on. Under this condition, when an overvoltage protecting circuit determines that a current or a voltage of the inductor or a current or a voltage of the input power source is larger than a threshold, the output current of the power converter flows to a ground through the overvoltage protecting circuit.
    Type: Application
    Filed: April 10, 2023
    Publication date: June 13, 2024
    Inventor: CHIH-NING CHEN
  • Patent number: 11821789
    Abstract: A sensor is provided. A first terminal of a first current source and a first terminal of a first transistor are connected to a cathode of the photodiode. A control terminal of a second transistor is connected to an output terminal of a first operational amplifier. A first terminal of the second transistor is connected to a second terminal of the first transistor through a first current mirror circuit. A second terminal of the second transistor is connected to a second current source, a second input terminal of a second operational amplifier and a first terminal of a third transistor. A first input terminal of the second operational amplifier is connected to the first terminal of the first transistor. A control terminal of the third transistor is connected to an output terminal of the second operational amplifier.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: November 21, 2023
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Chih-Ning Chen
  • Publication number: 20230369868
    Abstract: A switching charger for supplying stable power is provided. First input terminals of first and fourth operational amplifiers and a second input terminal of a second operational amplifier are connected to a battery. A second input terminal of the first operational amplifier is coupled to a reference voltage. A first input terminal of the second operational amplifier and a second input terminal of the fourth operational amplifier are connected to an inductor. A first input terminal of a third operational amplifier is connected to an input power source. A second input terminal of the third operational amplifier is connected to a system circuit. A first selector circuit is connected to output terminals of the third and fourth operational amplifiers. A second selector circuit is connected to output terminals of the first and second operational amplifiers and the first selector circuit.
    Type: Application
    Filed: July 19, 2022
    Publication date: November 16, 2023
    Inventors: CHUN-KAI HSU, CHIH-HENG SU, CHIH-NING CHEN
  • Patent number: 11796627
    Abstract: Disclosed are methods and systems for a WLAN device operating on DFS channels to calibrate the PRI as well as delays between partial pulses of received radar pulses that are impaired due to channel and filtering effects. The calibrated PRI may approximate the PRI of the transmitted pulses. The calibrated delay between the partial pulses estimates the interval between two partial pulses that originally belong to the same transmitted pulse. Using the calibrated PRI and the calibrated delay between partial pulses, the WLAN device may reconstruct the original pulses from received impaired pulses even when the impaired pulses are delayed and partial pulses of the original pulses. The WLAN device may use the calibrated results to correct the shortened PW and varying PRI of the impaired pulses to restore the partial pulses to their full PW with a relatively uniform PRI, increasing the probability of detecting the radar signals.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: October 24, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: Chih-Ning Chen, Chung-Yen Huang, Wen-Tong Kuo
  • Publication number: 20230336077
    Abstract: A switching charger having fast dynamic response for transition of a load is provided. A first terminal of a high-side switch is coupled to an input voltage. A first terminal of a low-side switch is connected to a second terminal of the high-side switch. A first terminal of an inductor is connected to a node between the first terminal of the low-side switch and the second terminal of the high-side switch. A second terminal of the inductor is connected to a first terminal of a capacitor. A constant on-time circuit determines a duty cycle of an on-time signal according to the input voltage and an output voltage of a node between the second terminal of the inductor and the first terminal of the capacitor. A control circuit controls a driver circuit to drive the high-side switch and the low-side switch according to the on-time signal.
    Type: Application
    Filed: September 16, 2022
    Publication date: October 19, 2023
    Inventor: CHIH-NING CHEN
  • Publication number: 20230297155
    Abstract: A power saving system of a battery charger is provided. A control terminal of a first transistor receives a wake-up signal. A counter is connected to a first terminal of the first transistor. The counter determines whether or not a working period of the wake-up signal from the first transistor is larger than a time threshold to output a counting signal. When the counting signal indicates that the working period of the wake-up signal is not larger than the time threshold, the counter and electronic components of an electronic device are turned off, thereby saving power of a battery. When the counting signal indicates that the working period of the wake-up signal is larger than the time threshold, the electronic device is switched from a power saving mode to a normal operation mode. In the normal operation mode, the battery can supply power to the electronic device.
    Type: Application
    Filed: June 6, 2022
    Publication date: September 21, 2023
    Inventors: CHIH-NING CHEN, CHIH-HENG SU
  • Patent number: 11755092
    Abstract: A power saving system of a battery charger is provided. A control terminal of a first transistor receives a wake-up signal. A counter is connected to a first terminal of the first transistor. The counter determines whether or not a working period of the wake-up signal from the first transistor is larger than a time threshold to output a counting signal. When the counting signal indicates that the working period of the wake-up signal is not larger than the time threshold, the counter and electronic components of an electronic device are turned off, thereby saving power of a battery. When the counting signal indicates that the working period of the wake-up signal is larger than the time threshold, the electronic device is switched from a power saving mode to a normal operation mode. In the normal operation mode, the battery can supply power to the electronic device.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: September 12, 2023
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chih-Ning Chen, Chih-Heng Su
  • Publication number: 20230283097
    Abstract: A switching charger for accurately sensing a small current is provided. First terminals of first transistors and a second transistor are coupled to a system voltage. Second terminals of the first transistors and a first input terminal of an operational amplifier are connected to a battery. A first terminal of a third transistor is connected to a second terminal of the second transistor and a second input terminal of the operational amplifier. A control terminal of the third transistor is connected to an output terminal of the operational amplifier. A first terminal of a fourth transistor is connected to a second terminal of the third transistor. First terminals of fifth transistors are coupled to an input voltage. Control terminals of the first transistors and the fifth transistors are connected to a control circuit. First terminals of sixth transistors are respectively connected to second terminals of the fifth transistors.
    Type: Application
    Filed: August 23, 2022
    Publication date: September 7, 2023
    Inventors: CHIH-NING CHEN, CHIH-HENG SU
  • Publication number: 20230258497
    Abstract: A sensor is provided. A first terminal of a first current source and a first terminal of a first transistor are connected to a cathode of the photodiode. A control terminal of a second transistor is connected to an output terminal of a first operational amplifier. A first terminal of the second transistor is connected to a second terminal of the first transistor through a first current mirror circuit. A second terminal of the second transistor is connected to a second current source, a second input terminal of a second operational amplifier and a first terminal of a third transistor. A first input terminal of the second operational amplifier is connected to the first terminal of the first transistor. A control terminal of the third transistor is connected to an output terminal of the second operational amplifier.
    Type: Application
    Filed: March 30, 2023
    Publication date: August 17, 2023
    Inventor: CHIH-NING CHEN
  • Patent number: 11656123
    Abstract: A sensor is provided. A first terminal of a first current source and a first terminal of a first transistor are connected to a cathode of the photodiode. A control terminal of a second transistor is connected to an output terminal of a first operational amplifier. A first terminal of the second transistor is connected to a second terminal of the first transistor through a first current mirror circuit. A second terminal of the second transistor is connected to a second current source, a second input terminal of a second operational amplifier and a first terminal of a third transistor. A first input terminal of the second operational amplifier is connected to the first terminal of the first transistor. A control terminal of the third transistor is connected to an output terminal of the second operational amplifier.
    Type: Grant
    Filed: September 15, 2021
    Date of Patent: May 23, 2023
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Chih-Ning Chen
  • Publication number: 20230009395
    Abstract: A sensor is provided. A first terminal of a first current source and a first terminal of a first transistor are connected to a cathode of the photodiode. A control terminal of a second transistor is connected to an output terminal of a first operational amplifier. A first terminal of the second transistor is connected to a second terminal of the first transistor through a first current mirror circuit. A second terminal of the second transistor is connected to a second current source, a second input terminal of a second operational amplifier and a first terminal of a third transistor. A first input terminal of the second operational amplifier is connected to the first terminal of the first transistor. A control terminal of the third transistor is connected to an output terminal of the second operational amplifier.
    Type: Application
    Filed: September 15, 2021
    Publication date: January 12, 2023
    Inventor: CHIH-NING CHEN
  • Patent number: 11307089
    Abstract: A light sensing device is provided, which includes a photodiode, a capacitor circuit and an ADC. The ADC includes a comparator, a counter, a reset switch, a logic circuit and a reference voltage switching circuit. The reference voltage switching circuit is controlled by the logic circuit to a determination reference voltage. When a primary integration time ends, a first node has a residual voltage that does not reach a reference voltage, the logic circuit controls the reference voltage switching circuit to provide the determination reference voltage to the comparator or the capacitor circuit within a secondary integration time, and the comparator outputs a comparison signal, the logic circuit receives the comparison signal within the secondary integration time, and determines the secondary value and outputs to the counter. The counter generates a primary value within the primary integration time, and the primary value is combined with the secondary value.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: April 19, 2022
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Chih-Ning Chen
  • Publication number: 20220082433
    Abstract: A light sensing device is provided, which includes a photodiode, a capacitor circuit and an ADC. The ADC includes a comparator, a counter, a reset switch, a logic circuit and a reference voltage switching circuit. The reference voltage switching circuit is controlled by the logic circuit to a determination reference voltage. When a primary integration time ends, a first node has a residual voltage that does not reach a reference voltage, the logic circuit controls the reference voltage switching circuit to provide the determination reference voltage to the comparator or the capacitor circuit within a secondary integration time, and the comparator outputs a comparison signal, the logic circuit receives the comparison signal within the secondary integration time, and determines the secondary value and outputs to the counter. The counter generates a primary value within the primary integration time, and the primary value is combined with the secondary value.
    Type: Application
    Filed: January 7, 2021
    Publication date: March 17, 2022
    Inventor: CHIH-NING CHEN
  • Patent number: 11255721
    Abstract: A light sensor having an adaptively controlled gain includes a photoelectric element, an operational amplifier, a comparator, an adaptive gain control circuit, a variable capacitor and a pulse accumulator circuit. The photoelectric element converts light energy into a photocurrent. The operational amplifier outputs an error amplified signal based on a gain multiplied by a voltage difference between an input voltage and a reference voltage. The comparator compares the error amplified signal with a voltage of a reference voltage source to output a comparison signal. The adaptive gain control circuit includes a pulse detector circuit and a gain control circuit. The pulse detector circuit detects the comparison signal and a clock signal to output a pulse detected signal. The adaptive gain control circuit outputs a capacitance modulating signal according to the pulse detected signal. A capacitance of the variable capacitor is modulated according to the capacitance modulating signal.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: February 22, 2022
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Chih-Ning Chen
  • Patent number: 11092483
    Abstract: A light sensor with high linearity is provided. A photoelectric component converts light energy into a photocurrent to a first capacitor. An error amplifier has a first amplification input terminal and a second amplification input terminal, which are respectively connected to a reference voltage source and a first terminal of a first transistor. A first terminal of a second transistor is connected to the second amplification input terminal. A second terminal of the first transistor is connected to the first capacitor. An output terminal of the error amplifier is connected to a second terminal of the second transistor. A first comparator compares a voltage of the first capacitor with a lowest one of a modulated voltage and a reference voltage to generate a first comparing signal. A counter circuit performs counting according to the first comparing signal.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: August 17, 2021
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Chih-Ning Chen
  • Patent number: 11088560
    Abstract: A charger having a fast transient response and a control method thereof are provided, which decide how to quickly respond to a requirement of a load by determining whether an input current reference signal indicating an input current is larger than or equal to a maximum safe current of a transformer. Therefore, the charger and the control method realize the fast transient response without having to control switching between a boost circuit and a buck circuit. Meanwhile, the charger and the control method thereof can be prevented from being damaged by an excessive input current and can stabilize an output voltage of the load more quickly.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: August 10, 2021
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chun-Kai Hsu, Chih-Ning Chen
  • Publication number: 20210199501
    Abstract: A dynamical time gain controlling light sensing device generates a detection time configuration signal according to a light intensity indication signal, and generates a set of adjustment switch signals to respectively control the plurality of gain selection switches to be turned on or off according to a ratio of a real gain time and a simulation gain time within a detection time, such that an overall gain of a resolution adjustment circuit can correspond to an substitute gain lower than a set gain within the simulation gain time and correspond to the set gain within the real gain time, thereby generating an adjusted count result signal.
    Type: Application
    Filed: June 10, 2020
    Publication date: July 1, 2021
    Inventors: CHIH-NING CHEN, CHIH-HENG SU
  • Patent number: 11047735
    Abstract: A dynamical time gain controlling light sensing device generates a detection time configuration signal according to a light intensity indication signal, and generates a set of adjustment switch signals to respectively control the plurality of gain selection switches to be turned on or off according to a ratio of a real gain time and a simulation gain time within a detection time, such that an overall gain of a resolution adjustment circuit can correspond to an substitute gain lower than a set gain within the simulation gain time and correspond to the set gain within the real gain time, thereby generating an adjusted count result signal.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: June 29, 2021
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chih-Ning Chen, Chih-Heng Su