Patents by Inventor Chih-Ping Tan

Chih-Ping Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7991172
    Abstract: The present invention discloses a half-voltage headphone driver circuit, comprising: at least one operational amplifier providing an output to a headphone speaker, and a charge pump receiving a supply voltage (VDD), generating a positive half-voltage and a negative half-voltage (VDD/2 and ?VDD/2) based on the supply voltage, and supplying the positive half-voltage and negative half-voltage as high and low operation levels to the at least one operational amplifier.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: August 2, 2011
    Assignee: Richtek Technology Corporation
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Shui-Mu Lin, Chih-Ping Tan
  • Patent number: 7907377
    Abstract: For protecting a power system, two or three of over current, thermal and under voltage protection circuits are integrated as one protection circuit but operate independently, and one or more protection points thereof are adjusted dynamically in response to detected condition of the power system. Specifically, using voltage and current conditions in the power system to modify the over current protection and the thermal protection maximizes the performance of the power system and covers the process bias in the circuits.
    Type: Grant
    Filed: January 7, 2009
    Date of Patent: March 15, 2011
    Assignee: Richtek Technology Corp.
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Patent number: 7714551
    Abstract: A linear voltage regulator comprises a transistor for converting a supply voltage to an output voltage. By directly monitoring the supply voltage and thereby rapidly responding when the supply voltage suffers a ripple, the linear voltage regulator enhances the stability of the output voltage.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: May 11, 2010
    Assignee: Richtek Technology Corp.
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Patent number: 7619396
    Abstract: Time-sharing technique is used for power conversion to improve the thermal dissipation thereof. In a power supply arrangement to provide a supply voltage to a load, a plurality of linear regulators are so switched that each time only one of them is enabled to convert an input voltage to the supply voltage, thereby each of them suffering less thermal dissipation.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: November 17, 2009
    Assignee: Richtek Technology Corp.
    Inventors: Chao-Hsuan Chuang, Cheng-Hsuan Fan, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Patent number: 7570121
    Abstract: A frequency jittering control circuit wherein by means of the characteristics of a PLL whose input switches between different frequencies, the output frequency of the PLL swings between the different frequencies to achieve the desired frequency jittering.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: August 4, 2009
    Assignee: Richtek Technology Corporation
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Patent number: 7535690
    Abstract: For protecting a power system, two or three of over current, thermal and under voltage protection circuits are integrated as one protection circuit but operate independently, and one or more protection points thereof are adjusted dynamically in response to detected condition of the power system. Specifically, using voltage and current conditions in the power system to modify the over current protection and the thermal protection maximizes the performance of the power system and covers the process bias in the circuits.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: May 19, 2009
    Assignee: Richtek Technology Corp.
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Publication number: 20090116160
    Abstract: For protecting a power system, two or three of over current, thermal and under voltage protection circuits are integrated as one protection circuit but operate independently, and one or more protection points thereof are adjusted dynamically in response to detected condition of the power system. Specifically, using voltage and current conditions in the power system to modify the over current protection and the thermal protection maximizes the performance of the power system and covers the process bias in the circuits.
    Type: Application
    Filed: January 7, 2009
    Publication date: May 7, 2009
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Publication number: 20080298605
    Abstract: The present invention discloses a half-voltage headphone driver circuit, comprising: at least one operational amplifier providing an output to a headphone speaker, and a charge pump receiving a supply voltage (VDD), generating a positive half-voltage and a negative half-voltage (VDD/2 and ?VDD/2) based on the supply voltage, and supplying the positive half-voltage and negative half-voltage as high and low operation levels to the at least one operational amplifier.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 4, 2008
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Shui-Mu Lin, Chih-Ping Tan
  • Publication number: 20080224782
    Abstract: A frequency jittering control circuit wherein by means of the characteristics of a PLL whose input switches between different frequencies, the output frequency of the PLL swings between the different frequencies to achieve the desired frequency jittering.
    Type: Application
    Filed: June 25, 2007
    Publication date: September 18, 2008
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Publication number: 20070188154
    Abstract: A linear voltage regulator comprises a transistor for converting a supply voltage to an output voltage. By directly monitoring the supply voltage and thereby rapidly responding when the supply voltage suffers a ripple, the linear voltage regulator enhances the stability of the output voltage.
    Type: Application
    Filed: February 12, 2007
    Publication date: August 16, 2007
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Publication number: 20070123021
    Abstract: A circuit under pad structure comprises a bonding pad to provide a bonding region and a probing region which are not overlapped to each other, so as to reduce the pounding to the structure under the bounding pad during the test and package process. A simple process for forming the circuit under pad structure is further provided, which comprises formation of a passivation layer over the bonding pad, and etch to the passivation layer to form two openings for exposing the bonding pad so as to provide the bonding region and the probing region.
    Type: Application
    Filed: November 22, 2006
    Publication date: May 31, 2007
    Inventors: Hung-Der Su, Chih-Ping Tan, Yu-Che Lin, Yuh-Chyuan Wang, Chao-Kang Ho
  • Publication number: 20070075690
    Abstract: Time-sharing technique is used for power conversion to improve the thermal dissipation thereof. In a power supply arrangement to provide a supply voltage to a load, a plurality of linear regulators are so switched that each time only one of them is enabled to convert an input voltage to the supply voltage, thereby each of them suffering less thermal dissipation.
    Type: Application
    Filed: September 26, 2006
    Publication date: April 5, 2007
    Inventors: Chao-Hsuan Chuang, Cheng-Hsuan Fan, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Publication number: 20070058310
    Abstract: For protecting a power system, two or three of over current, thermal and under voltage protection circuits are integrated as one protection circuit but operate independently, and one or more protection points thereof are adjusted dynamically in response to detected condition of the power system. Specifically, using voltage and current conditions in the power system to modify the over current protection and the thermal protection maximizes the performance of the power system and covers the process bias in the circuits.
    Type: Application
    Filed: September 11, 2006
    Publication date: March 15, 2007
    Inventors: Cheng-Hsuan Fan, Chao-Hsuan Chuang, Hung-Che Chou, Ching-Hsiang Yang, Chih-Ping Tan
  • Patent number: 6882014
    Abstract: A protection circuit for MOS components. In the protection circuit, a bypass PMOS transistor has a gate, a source and a substrate, all coupled to a first voltage node and a drain coupled to a gate of a MOS component. A bypass NMOS transistor has a gate, a source and a substrate, all coupled to a second voltage node and a drain coupled to the gate of the MOS component. When positive charges are accumulated on the gate of the MOS component due to an antenna effect, the bypass PMOS transistor dissipates the positive charges to the first voltage node. On the contrary, when negative charges are accumulated on the gate of the MOS component due to antenna effect, the bypass NMOS transistor dissipates the negative charges to the second voltage node.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: April 19, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chih-Ping Tan
  • Patent number: 6822840
    Abstract: The present invention provides a method and the apparatus thereof to protect MOS components from antenna effect. Via the bypass PMOS and NMOS transistors, charges with either polarity are conveyed and neutralized. The present invention thus protects the gate oxide layer of the MOS component in the IC circuit from damage or degradation.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: November 23, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chih-Ping Tan
  • Publication number: 20030207541
    Abstract: The present invention provides a method and the apparatus thereof to protect MOS components from antenna effect. Via the bypass PMOS and NMOS transistors, charges with either polarity are conveyed and neutralized. The present invention thus protects the gate oxide layer of the MOS component in the IC circuit from damage or degradation.
    Type: Application
    Filed: April 18, 2003
    Publication date: November 6, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chih-Ping Tan