Patents by Inventor Chih-Ping Wang

Chih-Ping Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240110977
    Abstract: A comparator testing circuit and a testing method are provided. The comparator testing circuit includes a switching circuit, a comparator, and a determination circuit. The switching circuit receives a first signal, a second signal, and a switching signal, and outputs one of the first signal and the second signal as a first input signal and the other of the first signal and the second signal as a second input signal according to the switching signal. The comparator compares the first input signal with the second input signal to generate an output signal. The determination circuit determines whether the comparator is abnormal based on the switching signal and the output signal to generate an exception flag.
    Type: Application
    Filed: September 25, 2023
    Publication date: April 4, 2024
    Applicant: Nuvoton Technology Corporation
    Inventors: Chih-Ping Lu, Cheng-Chih Wang
  • Publication number: 20240097888
    Abstract: In a file sharing system, a key manager unit realizes a correspondence between the first user identifier and the first public key in response to a registration request of the first user, generates a first key material for encrypting the first file into a first encrypted file, and generates a first credential according to the first user identifier, the first file identifier, the first public key and the first key material after receiving an access-right claim request to the first file from the first user. A file storage unit stores the first encrypted file and the first credential. The first user uses the first user identifier, the first file identifier and the first private key to retrieve the first key material out of the first credential, and uses the first key material to decrypt the first encrypted file into the first file.
    Type: Application
    Filed: September 18, 2023
    Publication date: March 21, 2024
    Inventors: CHIA-JUNG LIANG, CHIHHUNG LIN, CHIH-PING HSIAO, YU-JIE SU, CHIA-HSIN CHENG, TUN-HOU WANG, MENG-CHAO TSAI, YUEH-CHIN LIN
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20240079392
    Abstract: A semiconductor structure includes a first tier, a redistribution circuit structure, and a second tier. The first tier includes at least one first die. The redistribution circuit structure is disposed on the first tier and electrically coupled to the at least one first die, where the redistribution circuit structure has a multi-layer structure and includes a vertical connection structure continuously extending from a first side of the redistribution circuit structure to a second side of the redistribution circuit structure, and the first side is opposite to the second side along a stacking direction of the first tier and the redistribution circuit structure. The second tier includes a plurality of second dies, and is disposed on and electrically coupled to the redistribution circuit structure.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chuei-Tang WANG, Tso-Jung Chang, Jeng-Shien Hsieh, Shih-Ping Lin, Chih-Peng Lin, Chieh-Yen Chen, Chen-Hua Yu
  • Patent number: 11829349
    Abstract: A database is stored as a plurality of database shards in a distributed database grid comprising a plurality of grid elements, each including a mid-tier database system. A first grid element receives, from an application executing in the same memory as a mid-tier database system of the first grid element, a first database transaction including at least one database operation on specific data stored in a first database shard that belongs to the first grid element. The first grid element performs and commits the first database transaction without participation of another grid element of the plurality of grid elements. The first grid element receives a second database transaction that requires access to another database shard that does not belong to the first grid element. Multiple grid elements of the plurality of grid elements perform the second database transaction and commit the second database transaction using a two-phase commit protocol.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: November 28, 2023
    Assignee: Oracle International Corporation
    Inventors: Tirthankar Lahiri, Derek Taylor, Nagender Bandi, John Miller, Chi-Kim Hoang, Ryder Rishel, Varadarajan Aravamudhan, Chih-Ping Wang, Susan Cheung, Samuel Drake, Paul Tuck, David Aspinwall
  • Publication number: 20230223453
    Abstract: Semiconductor device structures with a gate structure having different profiles at different portions of the gate structure may include a fin structure on a substrate, a source/drain structure on the fin structure, and a gate structure over the fin structure and along a sidewall of the fin. The source/drain structure is proximate the gate structure. The gate structure has a top portion having a first sidewall profile and a bottom portion having a second sidewall profile different from the first sidewall profile.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 13, 2023
    Inventors: Chih Ping Wang, Chao-Cheng Chen, Jr-Jung Lin, Chi-Wei Yang
  • Publication number: 20230207670
    Abstract: A method includes forming isolation regions extending into a semiconductor substrate, wherein semiconductor strips are located between the isolation regions, and forming a dielectric dummy strip between the isolation regions, recessing the isolation regions. Some portions of the semiconductor strips protrude higher than top surfaces of the recessed isolation regions to form protruding semiconductor fins, and a portion of the dielectric dummy strip protrudes higher than the top surfaces of the recessed isolation regions to form a dielectric dummy fin. The method further includes etching the dielectric dummy fin so that a top width of the dielectric dummy fin is smaller than a bottom width of the dielectric dummy fin. A gate stack is formed on top surfaces and sidewalls of the protruding semiconductor fins and the dielectric dummy fin.
    Type: Application
    Filed: March 3, 2023
    Publication date: June 29, 2023
    Inventors: Shih-Yao Lin, Pei-Hsiu Wu, Chih Ping Wang, Chih-Han Lin, Jr-Jung Lin, Yun Ting Chou, Chen-Yu Wu
  • Patent number: 11605719
    Abstract: Semiconductor device structures with a gate structure having different profiles at different portions of the gate structure may include a fin structure on a substrate, a source/drain structure on the fin structure, and a gate structure over the fin structure and along a sidewall of the fin. The source/drain structure is proximate the gate structure. The gate structure has a top portion having a first sidewall profile and a bottom portion having a second sidewall profile different from the first sidewall profile.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: March 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih Ping Wang, Chao-Cheng Chen, Jr-Jung Lin, Chi-Wei Yang
  • Patent number: 11600717
    Abstract: A method includes forming isolation regions extending into a semiconductor substrate, wherein semiconductor strips are located between the isolation regions, and forming a dielectric dummy strip between the isolation regions, recessing the isolation regions. Some portions of the semiconductor strips protrude higher than top surfaces of the recessed isolation regions to form protruding semiconductor fins, and a portion of the dielectric dummy strip protrudes higher than the top surfaces of the recessed isolation regions to form a dielectric dummy fin. The method further includes etching the dielectric dummy fin so that a top width of the dielectric dummy fin is smaller than a bottom width of the dielectric dummy fin. A gate stack is formed on top surfaces and sidewalls of the protruding semiconductor fins and the dielectric dummy fin.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Shih-Yao Lin, Pei-Hsiu Wu, Chih Ping Wang, Chih-Han Lin, Jr-Jung Lin, Yun Ting Chou, Chen-Yu Wu
  • Patent number: 11334445
    Abstract: In an in-memory database management system, non-volatile random access memories (NVRAMs) are used to store database data and control data. Because this data is stored in NVRAM, the data survives system failures. Recovery from a system failure may be accomplished more quickly by, at least in part, modifying the surviving data in NVRAM, rather than loading an entire checkpoint image and applying uncheckpointed transactions needed to synchronize the database. Because in this form of recovery the database state that serves as the starting point for applying change records is the database as stored in the NVRAM, this form of recovery is referred to herein as in-memory-based recovery. Recovery, where the database state that serves as the starting point for applying change records is a checkpoint image, is referred to herein as checkpointed-based recovery. In-memory-based recovery eliminates or reduces the need to perform certain operations that are performed for checkpointed-based recovery.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: May 17, 2022
    Assignee: Oracle International Corporation
    Inventors: Tirthankar Lahiri, Martin Reames, Kao Makino, Ananth Raghavan, Chih-Ping Wang, Mutsumi Kogawa, Jorge Luis Issa Garcia
  • Publication number: 20210367059
    Abstract: A method includes forming isolation regions extending into a semiconductor substrate, wherein semiconductor strips are located between the isolation regions, and forming a dielectric dummy strip between the isolation regions, recessing the isolation regions. Some portions of the semiconductor strips protrude higher than top surfaces of the recessed isolation regions to form protruding semiconductor fins, and a portion of the dielectric dummy strip protrudes higher than the top surfaces of the recessed isolation regions to form a dielectric dummy fin. The method further includes etching the dielectric dummy fin so that a top width of the dielectric dummy fin is smaller than a bottom width of the dielectric dummy fin. A gate stack is formed on top surfaces and sidewalls of the protruding semiconductor fins and the dielectric dummy fin.
    Type: Application
    Filed: October 13, 2020
    Publication date: November 25, 2021
    Inventors: Shih-Yao Lin, Pei-Hsiu Wu, Chih Ping Wang, Chih-Han Lin, Jr-Jung Lin, Yun Ting Chou, Chen-Yu Wu
  • Patent number: 11176115
    Abstract: Techniques are described for performing dependency locking to enable parallel execution of database server processes modifying the same object. In an embodiment, a DBMS receives a request to execute an operation on its managed database. The request may include an object identifier and a version identifier for a version of a database object, which is required for the successful execution of the operation on the database. The required version of the database object may not exist and may be generated only after the execution of another, second, operation on the database. The first database server process initiates execution of the earlier received operation on the database. The first database server process queries the first database for the version of the particular database object and determines that the version of the database object does not exist yet, in one embodiment.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: November 16, 2021
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Chi Kim Hoang, Chih-Ping Wang, Nagender Bandi, John Miller
  • Publication number: 20200373401
    Abstract: Semiconductor device structures comprising a gate structure having different profiles at different portions of the gate structure are provided. In some examples, a semiconductor device includes a fin structure on a substrate, a source/drain structure on the fin structure, and a gate structure over the fin structure and along a sidewall of the fin. The source/drain structure is proximate the gate structure. The gate structure has a top portion having a first sidewall profile and a bottom portion having a second sidewall profile different from the first sidewall profile.
    Type: Application
    Filed: August 13, 2020
    Publication date: November 26, 2020
    Inventors: Chih Ping Wang, Chao-Cheng Chen, Jr-Jung Lin, Chi-Wei Yang
  • Patent number: 10756759
    Abstract: In column domain dictionary compression, column values in one or more columns are tokenized by a single dictionary. The domain of the dictionary is the entire set of columns. A dictionary may not only map a token to a tokenized value, but also to a count (“token count”) of the number of occurrences of the token and corresponding tokenized value in the dictionary's domain. Such information may be used to compute queries on the base table.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: August 25, 2020
    Assignee: Oracle International Corporation
    Inventors: Tirthankar Lahiri, Chi-Kim Hoang, Dina Thomas, Kirk Meredith Edson, Subhradyuti Sarkar, Mark McAuliffe, Marie-Anne Neimat, Chih-Ping Wang
  • Publication number: 20200125549
    Abstract: Techniques are described for performing dependency locking to enable parallel execution of database server processes modifying the same object. In an embodiment, a DBMS receives a request to execute an operation on its managed database. The request may include an object identifier and a version identifier for a version of a database object, which is required for the successful execution of the operation on the database. The required version of the database object may not exist and may be generated only after the execution of another, second, operation on the database. The first database server process initiates execution of the earlier received operation on the database. The first database server process queries the first database for the version of the particular database object and determines that the version of the database object does not exist yet, in one embodiment.
    Type: Application
    Filed: May 31, 2019
    Publication date: April 23, 2020
    Inventors: CHI KIM HOANG, CHIH-PING WANG, NAGENDER BANDI, JOHN MILLER
  • Publication number: 20200125457
    Abstract: In an in-memory database management system, non-volatile random access memories (NVRAMs) are used to store database data and control data. Because this data is stored in NVRAM, the data survives system failures. Recovery from a system failure may be accomplished more quickly by, at least in part, modifying the surviving data in NVRAM, rather than loading an entire checkpoint image and applying uncheckpointed transactions needed to synchronize the database. Because in this form of recovery the database state that serves as the starting point for applying change records is the database as stored in the NVRAM, this form of recovery is referred to herein as in-memory-based recovery. Recovery, where the database state that serves as the starting point for applying change records is a checkpoint image, is referred to herein as checkpointed-based recovery. In-memory-based recovery eliminates or reduces the need to perform certain operations that are performed for checkpointed-based recovery.
    Type: Application
    Filed: December 26, 2018
    Publication date: April 23, 2020
    Inventors: TIRTHANKAR LAHIRI, MARTIN REAMES, KAO MAKINO, ANANTH RAGHAVAN, CHIH-PING WANG, MUTSUMI KOGAWA, JORGE LUIS ISSA GARCIA
  • Publication number: 20190145015
    Abstract: The disclosure provides a preparation method of a porous copper alloy wick, including the steps of: a) preparing an electrolyte, which is an aqueous solution including 0.5-1.8 mol/L sulfuric acid and 0.1-0.5 mol/L copper sulfate; b) cleaning with a mixed solution of a surfactant and a basic compound, activating with dilute hydrochloric acid and then cleaning the surface of a copper alloy substrate; c) forming a porous structure on the substrate by electrodeposition on the treated substrate in the electrolyte; and d) washing with water, drying and then sintering the product obtained in step c). By the method of the disclosure, the porous structure with the specific arrangement, excellent capillary force and permeability can be directly obtained on the surface of the substrate, which is good for the transmission of the working liquid.
    Type: Application
    Filed: April 18, 2018
    Publication date: May 16, 2019
    Applicant: Delta Electronics (Jiangsu) Ltd.
    Inventors: Quanyao YU, BOR-LIN LEE, Chih-Ping WANG, Chun-Lung CHIU
  • Publication number: 20190145714
    Abstract: The disclosure provides a method for preparing a porous wick, including the steps of: a) preparing an first electrolyte, which is an aqueous solution including 0.5-1.8 mol/L sulfuric acid and 0.1-0.5 mol/L copper sulfate; b) preparing a second electrodeposition electrolyte, which is an aqueous solution including 0.2-0.9 mol/L sulfuric acid and 0.4-0.9 mol/L copper sulfate; c) cleaning the surface of a metal substrate with a mixed solution of a surfactant and a basic compound, activating with dilute hydrochloric acid, and then rinsing; and d) carrying out a first elctrodeposition on the treated substrate in the first electrodeposition electrolyte, and then carrying out the second electrodeposition in the second electrodeposition electrolyte, wherein the second electrodeposition current density is smaller than the first electrodeposition current density.
    Type: Application
    Filed: April 18, 2018
    Publication date: May 16, 2019
    Applicant: Delta Electronics (Jiangsu) Ltd.
    Inventors: Quanyao YU, BOR-LIN LEE, Chih-Ping WANG, Chun-Lung CHIU
  • Patent number: 9639562
    Abstract: A method, apparatus, and system for automatically determining an optimal database subsection is provided. A database subsection is selected to optimize certain benefits when the database subsection is translated, transferred, and cached on an alternative database system, which may utilize a different technology or database engine that provides certain performance benefits compared to the original database system. Algorithms such as multi-path greedy selection and/or dynamic programming may provide optimal or near-optimal results. A host for the alternative database server may be shared with or otherwise located in close physical proximity to improve latency for a database application or client layer. Once the database subsection analysis is completed, a report may be generated and presented to the user, and an implementation script may also be created to automatically configure a client host to function as a cache or replacement system according various cache size configurations described in the report.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 2, 2017
    Assignee: Oracle International Corporation
    Inventors: John Raitto, Tirthankar Lahiri, Marie-Anne Neimat, Chih-Ping Wang
  • Patent number: 9569475
    Abstract: A plurality of mid-tier databases form a single, consistent cache grid for data in one or more backend data sources, such as a database system. The mid-tier databases may be standard relational databases. Cache agents at each mid-tier database swap in data from the backend database as needed. Ownership locks maintain consistency in the cache grid. Cache agents prevent database operations that will modify cached data in a mid-tier database unless and until ownership of the cached data can be acquired for the mid-tier database. Cache groups define what backend data may be cached, as well as a general structure in which the backend data is to be cached. Metadata for cache groups is shared to ensure that data is cached in the same form throughout the entire grid. Ownership of cached data can then be tracked through a mapping of cached instances of data to particular mid-tier databases.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: February 14, 2017
    Assignee: Oracle International Corporation
    Inventors: Chi-Kim Hoang, Tirthankar Lahiri, Marie-Anne Neimat, Chih-Ping Wang, John E. Miller, Dilys Thomas, Nagender Bandi, Susan Cheng