Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A functional testing device includes a substrate, a plurality of connection ports, an input/output module, a main control module and a power module. The plurality of connection ports are disposed on the substrate. The input/output module is disposed on the substrate and configured to receive at least one test script. The main control module is disposed on the substrate and connected to the plurality of connection ports, the main control module is configured to output a plurality of testing signals to at least one of the plurality of connection ports according to the at least one test script. The power module is disposed on the substrate and configured to receive and transmit power to the main control module.

Abstract: A functional testing method, adapted to a device under test, includes, by a main control chip, performing: requesting a test script according to identification information of the device under test from a database server, wherein the test script comprises a plurality of testing items of different types, and testing the device under test according to the test script.

Abstract: A functional testing device includes a substrate, an input/output module, a plurality of functional testing modules, a baseboard management control module and a power module. The input/output module is disposed on the substrate and configured to receive a test script. The plurality of functional testing modules are pluggably disposed on the substrate. The baseboard management control module is disposed on the substrate and connected to the input/output module and the plurality of functional testing modules, the baseboard management control module is configured to control the plurality of functional testing modules output a plurality of testing signals according to the test script. The power module is disposed on the substrate and configured to receive and transmit power to the plurality of functional testing modules and the baseboard management control module.

Abstract: Semiconductor device structures with a gate structure having different profiles at different portions of the gate structure may include a fin structure on a substrate, a source/drain structure on the fin structure, and a gate structure over the fin structure and along a sidewall of the fin. The source/drain structure is proximate the gate structure. The gate structure has a top portion having a first sidewall profile and a bottom portion having a second sidewall profile different from the first sidewall profile.

Abstract: An integrated circuit includes a memory cell array, a row decoder configured to generate a first decoder signal, a column decoder configured to generate a second decoder signal, and an array of write assist circuits coupled to the row and column decoder and the memory cell array. Each write assist circuit is configured to set an operating voltage of a corresponding memory cell, and generate the output signal in response to a first control signal. The operating voltage corresponds to an output signal. Each write assist circuit includes an AND gate coupled to a programmable voltage tuner. The programmable voltage tuner includes a set of P-type transistors coupled to a first P-type transistor. The set of P-type transistors is coupled together in parallel, and receives a set of select control signals. A first terminal of the first P-type transistor is configured to receive an AND signal from the AND gate.

Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: An anti-PD-L1 antibody, or an antigen-binding fragment thereof, comprising: a heavy chain variable region comprising the three CDRs with the sequences of SEQ ID NOs: 2-4, 6-8, 10-12, 14-16, or 18-20; and/or a light chain variable region comprising the three CDRs with the sequences of SEQ ID NOs: 22-24, 26-28, 30-32, 34-36, or 38-40, wherein the antibody is a chimeric, humanized, composite, or human antibody.

Abstract: A safety electric socket in which two spring-supported doorplates are respectively pivoted to a holder block to block the neutral and hot slots against outside dust and water and to stop the spring-supported on/off switching button from downward movement. The doorplates are opened for allowing downward movement of the switching button to switch on power supply when the neutral and hot blades of an electric plug are respectively inserted into the neutral and hot slots.

Abstract: A composition of human interferon-alpha (IFN-?) subtypes produced from human lymphoblastoid cells is disclosed. These purified IFN-? composition comprise higher specific activities and may be applied in the treatment of cancers, viruses, and immuno diseases.

Abstract: The present disclosure pertains to an integrated post-etch treatment method which is performed after a dielectric etch process. Using the method of the invention, byproducts formed on the sidewalls of contact vias during the dielectric etch process can be removed efficiently. The method of the invention also reduces or eliminates the problem of polymer accumulation on process chamber surfaces. An overlying photoresist layer and anti-reflection layer are removed during the performance of the post-etch treatment method. Typically, after the etch of a dielectric material to define pattern or interconnect filling spaces, a series of post-etch treatment steps is performed to remove residues remaining on the wafer after the dielectric etch process. According to the method of the present invention, a post-etch treatment method including one or more steps is performed after the dielectric etch process, preferably within the same processing chamber in which the dielectric etch process was performed.

Abstract: The present invention relates to compounds of formula I which are 4-hydroxy-benzopyran-2-ones and 4-hydroxy-cycloalkyl?b!pyran-2-ones useful for inhibiting a retrovirus in a mammalian cell infected with said retrovirus. ##STR1## Wherein R.sub.10 and R.sub.