Abstract: A radio frequency (RF) device and a voltage generation and harmonic suppressor thereof are provided. The RF device includes the voltage generation and harmonic suppressor and a RF circuit. The voltage generation and harmonic suppressor is configured to receive a RF signal to output at least one direct current (DC) voltage related to the RF signal, and configured to suppress a harmonic generated by the RF signal in the voltage generation and harmonic suppressor. The RF circuit is configured to receive the RF signal, and configured to perform an operation according to the at least one DC voltage.

Abstract: A switch device includes a first radio-frequency (RF) terminal, a second RF terminal, a first transistor, a second transistor, and a variable resistance element. The first transistor includes a first terminal coupled to the first RF terminal, a second terminal, and a control terminal coupled to a control signal terminal providing a control signal. The second transistor includes a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the second RF terminal, and a control terminal. The variable resistance element is coupled between the second terminal of the first transistor and a bias voltage terminal. When the first transistor and the second transistor are in a transient state, the variable resistance element provides a lower resistance. When the first transistor and the second transistor are in an ON state, the variable resistance element provides a higher resistance.

Abstract: A radio frequency (RF) device and a multi-band matching circuit thereof are provided. The multi-band matching circuit includes an inductance circuit, a first capacitance circuit, an inductor, and a second capacitance circuit. A first terminal of the inductance circuit is coupled to a RF signal input terminal of the multi-band matching circuit. A first terminal of the first capacitance circuit is coupled to a second terminal of the inductance circuit. A first terminal of the inductor and a first terminal of the second capacitance circuit are coupled to a second terminal of the first capacitance circuit. A second terminal of the inductor is coupled to a first reference voltage. A second terminal of the second capacitance circuit is coupled to a second reference voltage. The second capacitance circuit is controlled by a single-bit control signal to change a capacitance value of the second capacitance circuit.

Abstract: A compensation circuit includes a resistor-capacitor circuit and a control circuit. The resistor-capacitor circuit is used to generate a first voltage when a reference signal is in a first state, and generate a second voltage and a third voltage when the reference signal is in a second state. The resistor-capacitor circuit includes a first resistor-capacitor sub-circuit and a second resistor-capacitor sub-circuit. The first resistor-capacitor sub-circuit and the second resistor-capacitor sub-circuit are coupled to the control circuit, and operate simultaneously to compute an ON time of a front end module. The control circuit is coupled to the resistor-capacitor circuit, and is used to acquire the ON time according to the first voltage, the second voltage, and the third voltage, and includes an adjustment circuit used to generate a bias signal according to the ON time, and output the bias signal to the front end module.

Abstract: The switch device includes a first circuit. The first circuit has a first end coupled between a first terminal and a second terminal, and the first circuit has the second end coupled between the first terminal and the second terminal or coupled to a third terminal. The first circuit includes a first switch and a second switch. The first switch is coupled between the first end and the second end of the first circuit and is turned on or off according to a first control signal. The second switch is connected to the first switch in parallel and is turned on or off according to a second control signal. The first switch and the second switch include transistors of the same type. In a surge protection mode, the second switch is turned on to dissipate the surge current.

Abstract: The present invention discloses a bias compensation circuit. The bias compensation circuit includes a detecting circuit, including a diode-connected transistor circuit, with a first end for receiving a first current, and a second end coupled to a first reference voltage end; and a first diode circuit, with a first end for receiving a second current, and a second end coupled to the first reference voltage end; wherein the detecting circuit provides a first voltage level according to the diode-connected transistor circuit, and provides a second voltage level according to the first diode circuit; a voltage-current converting circuit, coupled to the detecting circuit, for generating a first reference current according to the first voltage level and the second voltage level; and a bias circuit, coupled to the voltage-current converting circuit, for receiving the first reference current, to provide a bias voltage level according to the first reference current.

Abstract: A matching circuit includes an input terminal, an output terminal, a first impedance component, a first set of switching devices, a second impedance component, a second set of switching devices and a controller. The first impedance component includes a first terminal coupled between the input terminal and the output terminal, and a second terminal. The first set of switching devices is coupled to the second terminal of the first impedance component, the controller and a reference terminal. The second impedance component includes a first terminal coupled between the second terminal of the first impedance component and the first set of switching devices, and a second terminal. The second set of switching devices is coupled to the second terminal of the second impedance component, the controller and the reference terminal. The controller controls the first set of switch devices and the second set of switch devices according to a detection signal.

Abstract: A microphone system is disclosed, comprising: a microphone array and a processing unit. The microphone array comprises Q microphones that detect sound and generate Q audio signals. The processing unit is configured to perform operations comprising: spatial filtering over the Q audio signals using a trained model based on at least one target beam area (TBA) and coordinates of the Q microphones to generate a beamformed output signal originated from ? target sound source inside the at least one TBA, where ?>=0. Each TBA is defined by r time delay ranges for r combinations of two microphones out of the Q microphones, where Q>=3 and r>=1. A dimension of a first number for locations of all sound sources able to be distinguished by the processing unit increases as a dimension of a second number for a geometry formed by the Q microphones increases.

Abstract: A front end module includes a first radio frequency (RF) terminal, a second RF terminal, a third RF terminal, a transmission path and a reception path. The transmission path is formed between the first RF terminal and the third RF terminal. The reception path is formed between the first RF terminal and the second RF terminal. The reception path includes a first set of switches, a second set of switches, a third set of switches and an amplifier. An amplifier is coupled to the second set of switches and the second RF terminal. The third set of switches is coupled to the first set of switches and the second RF terminal. When a transmission signal is transmitted to the first RF terminal via the transmission path, the first set of switches, the second set of switches and the third set of switches are turned off.

Abstract: A microphone system of the invention is applicable to an electronic device comprising an adjustable mechanism that causes a change in geometry of a microphone array. The microphone system comprises the microphone array, a sensor and a beamformer. The microphone array comprises multiple microphones that detect sound and generate multiple audio signals. The sensor detects a mechanism variation of the electronic device to generate a sensing output. The beamformer is configured to perform a set of operations comprising: performing a spatial filtering operation over the multiple audio signals using a trained model based on the sensing output, one or more first sound sources in one or more desired directions and one or more second sound sources in one or more undesired directions to generate a beamformed output signal originated from the one or more first sound sources.

Abstract: A switch device includes a first radio-frequency (RF) terminal, a second RF terminal, a first transistor, a second transistor, and a variable resistance element. The first transistor includes a first terminal coupled to the first RF terminal, a second terminal, and a control terminal coupled to a control signal terminal providing a control signal. The second transistor includes a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the second RF terminal, and a control terminal. The variable resistance element is coupled between the second terminal of the first transistor and a bias voltage terminal. When the first transistor and the second transistor are in a transient state, the variable resistance element provides a lower resistance. When the first transistor and the second transistor are in an ON state, the variable resistance element provides a higher resistance.

Abstract: An amplifier circuit includes an amplifier, a detector and an adjustment circuit. The amplifier includes a first transistor and a bias voltage terminal. The first transistor includes a first terminal coupled to a first reference voltage terminal, a second terminal coupled to a second reference voltage terminal, and a control terminal coupled to the bias voltage terminal of the amplifier. The second transistor includes a first terminal coupled to a third reference voltage terminal and the detector, and a second terminal coupled to the second reference voltage terminal. The detector outputs a detection signal related to a characteristic parameter of the second transistor. The adjustment circuit is coupled to the detector and the bias voltage terminal of the amplifier for performing an adjustment operation according to the detection signal.

Abstract: A radio frequency switch has an antenna end, a first signal end for transmitting a first radio frequency signal, a second signal end for transmitting a second radio frequency signal, a third signal end for transmitting a third radio frequency signal, a first series path having a first switch, a second series path having a second switch, a third series path having a third switch, a first shunt path coupled between the first signal end and a node, a second shunt path coupled between the second signal end and the node, a common path coupled between the node and a first reference voltage end, and a third shunt path coupled between the third signal end and a second reference voltage end. The first series path and the second series path are connected to a common ground pad via the common path.

Abstract: A computer-implemented method for generating a first set of longest common sequences from a plurality of known malicious webpages, the first set of longest common sequences representing input data from which a human generates a set of regular expressions for detecting phishing webpages. There is included obtaining HTML source strings from the plurality of known malicious webpages and transforming the HTML source strings to reduce the number of at least one of stop words and repeated tags, thereby obtaining a set of transformed source strings. There is further included performing string alignment on the set of transformed source strings, thereby obtaining at least a scoring matrix. There is additionally included obtaining a second set of longest common sequences responsive to the performing the string alignment. There is further included filtering the second set of longest common sequences, thereby obtaining the first set of longest common sequences.

Abstract: A device of measuring a duty cycle includes a resistor-capacitor circuit and a control circuit. The resistor-capacitor circuit is used to generate a first voltage when a reference signal is in a first state, and generate a second voltage and a third voltage when the reference signal is in a second state. The control circuit is coupled to the resistor-capacitor circuit, and configured to acquire an ON-time according to the first voltage, the second voltage and the third voltage. The ON-time is a time interval during which the reference signal is in the first state.

Abstract: A radio frequency (RF) switch includes a signal terminal, a reference voltage terminal and a shunt switch path. The shunt switch path includes a first sub-shunt circuit and a second sub-shunt circuit. The second sub-shunt circuit includes a first transistor and a second transistor coupled in parallel. When switched to a first state, the RF switch has first impedance; when switched to a second state, the RF switch has second impedance; and when switched to a third state, the RF switch has third impedance. The first impedance, the second impedance, and the third impedance are different.

Abstract: A voltage state detector includes a voltage drop circuit, a pull-down circuit, a load circuit, a transistor, a pull-up circuit, first and second output terminals, and a logic circuit. The pull-down circuit is coupled to the voltage drop circuit. The transistor has a first terminal coupled to the load circuit, a second terminal coupled to the pull-down circuit, and a control terminal coupled to the voltage drop circuit. The pull-up circuit is coupled to the load circuit and the voltage drop circuit. The first output terminal is coupled to the first terminal of the transistor for outputting a first state determination signal. The second output terminal is coupled to the voltage drop circuit for outputting a second state determination signal. The logic circuit includes a NOR gate for performing an NOR operation on the first state determination signal and the second state determination signal to output a control signal.

Abstract: The invention provides a radio frequency (RF) amplifier apparatus including an amplifier and a resonance circuit. An input terminal of the amplifier receives an RF signal. The amplifier amplifies a first frequency component of the RF signal and outputs the amplified first frequency component to an output terminal of the amplifier. A first terminal and a second terminal of the resonance circuit are respectively coupled to the input terminal and the output terminal of the amplifier. The resonance circuit provides a low impedance path for a second frequency component of the RF signal between the input terminal and the output terminal of the amplifier, and provides a high impedance path for the first frequency component of the RF signal between the input terminal and the output terminal of the amplifier.

Abstract: A radio frequency (RF) device and a multi-band matching circuit thereof are provided. The multi-band matching circuit includes an inductance circuit, a first capacitance circuit, an inductor, and a second capacitance circuit. A first terminal of the inductance circuit is coupled to a RF signal input terminal of the multi-band matching circuit. A first terminal of the first capacitance circuit is coupled to a second terminal of the inductance circuit. A first terminal of the inductor and a first terminal of the second capacitance circuit are coupled to a second terminal of the first capacitance circuit. A second terminal of the inductor is coupled to a first reference voltage. A second terminal of the second capacitance circuit is coupled to a second reference voltage. The second capacitance circuit is controlled by a single-bit control signal to change a capacitance value of the second capacitance circuit.

Abstract: A switch device includes a first radio-frequency (RF) terminal, a second RF terminal, a first transistor, a second transistor, and a variable resistance element. The first transistor includes a first terminal coupled to the first RF terminal, a second terminal, and a control terminal coupled to a control signal terminal providing a control signal. The second transistor includes a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the second RF terminal, and a control terminal. The variable resistance element is coupled between the second terminal of the first transistor and a bias voltage terminal. When the first transistor and the second transistor are in a transient state, the variable resistance element provides a lower resistance. When the first transistor and the second transistor are in an ON state, the variable resistance element provides a higher resistance.