Patents by Inventor Chih-Sheng Huang

Chih-Sheng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240135078
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Patent number: 11929273
    Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Tsung-Sheng Kuo, Chih-Hung Huang, Guan-Wei Huang, Ping-Yung Yen, Hsuan Lee, Jiun-Rong Pai
  • Publication number: 20240079396
    Abstract: A package structure includes a first carrier, a second carrier, and a first electronic device. The first carrier is electrically connected to a first voltage. The second carrier includes a first substrate and a first interconnect structure. The first substrate is in contact with the first carrier, the first interconnect structure is electrically connected to a second voltage, and the first interconnect structure and the first carrier are deposited on two opposite sides of the first substrate. The first electronic device is deposited on the first interconnect structure and away from the first carrier. The first electronic device is in contact with the first interconnect structure.
    Type: Application
    Filed: November 30, 2022
    Publication date: March 7, 2024
    Inventors: Lung-Sheng LIN, Chih-Feng HUANG, Ta-Yung YANG
  • Patent number: 11916018
    Abstract: A connection structure of a semiconductor device is provided in the present invention. The connection structure includes an interlayer dielectric, a top metal structure, and a passivation layer. The interlayer dielectric is disposed on a substrate. The top metal structure is disposed on the interlayer dielectric. The top metal structure includes a bottom portion and a top portion disposed on the bottom portion. The bottom portion includes a first sidewall, and the top portion includes a second sidewall. A slope of the first sidewall is larger than a slope of the second sidewall. The passivation layer is conformally disposed on the second sidewall, the first sidewall, and a top surface of the interlayer dielectric.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 27, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chen-Yi Weng, Shih-Che Huang, Ching-Li Yang, Chih-Sheng Chang
  • Publication number: 20230387204
    Abstract: A semiconductor device includes a plurality of nanostructures, a gate dielectric layer disposed on each nanostructure of the plurality of nanostructures, a gate electrode disposed on the gate dielectric layer and on the plurality of nanostructures, and a source/drain region adjacent to the nanostructures. The source/drain region includes an epitaxial structure including a polygonal-shaped upper portion and a column-like lower portion, wherein the polygonal-shaped upper portion has multiple facets, and each of the facets characterized by a (111) crystallographic orientation. The polygonal-shaped upper portion includes corner regions adjacent an intersection of two facets with a (111) crystallographic orientation and an epitaxial body region in contact with the corner regions. The corner regions are characterized by a first dopant concentration and the epitaxial body region is characterized by a second dopant concentration, and the first dopant concentration is higher than the second dopant concentration.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: Chih Sheng Huang, Ming-Hua Yu, Yee-Chia Yeo
  • Publication number: 20220398774
    Abstract: An AI-based object recognition method is provided to recognize an object in a first image captured by a photographic device at a first shooting angle. The method includes: Step A, determining a difference value between the first shooting angle and a preset second shooting angle; Step B, converting the first image into a second image with a view angle of the second shooting angle when the difference value is greater than a preset value; and Step C, sending the second image to an artificial intelligence model for recognition.
    Type: Application
    Filed: May 27, 2022
    Publication date: December 15, 2022
    Inventors: I-Hau YEH, Chia-Hsing LIN, Chih-Sheng Huang, Kuo-Ching HUNG
  • Publication number: 20220344508
    Abstract: A method includes forming a first semiconductor fin on a substrate, forming a source/drain region in the first semiconductor fin, depositing a capping layer on the source/drain region, where the capping layer includes a first boron concentration higher than a second boron concentration of the source/drain region, etching an opening through the capping layer, the opening exposing the source/drain region, forming a silicide layer on the exposed source/drain region and forming a source/drain contact on the silicide layer.
    Type: Application
    Filed: January 24, 2022
    Publication date: October 27, 2022
    Inventors: Chih-Sheng Huang, Chih-Chiang Chang, Ming-Hua Yu, Yee-Chia Yeo
  • Publication number: 20220071391
    Abstract: The present invention relates to a high structural strength display stand with bending tubes. The display stand includes a lower supporting unit, an upper supporting unit and a foot rack. The lower supporting unit has a plurality of lower supports, each of which comprises a first and a second bending section spaced from each other. The upper supporting unit has a plurality of upper supports, each of which comprises a third and a fourth bending section spaced from each other. The foot rack is arranged adjacent to the lower supporting unit and assembled to the lower supports, such that the foot rack and the lower supports are juxtaposed.
    Type: Application
    Filed: September 4, 2020
    Publication date: March 10, 2022
    Inventor: Chih-Sheng Huang
  • Patent number: 9692252
    Abstract: A lock wireless charging system includes a gateway (10) and a door lock (20). The gateway (10) includes a first micro-processing unit (101), a first signal-fetching unit (102), a first charging unit (103), a first signal-processing unit (104) and a first antenna unit (105). The door lock (20) includes a second micro-processing unit (201), a second signal-fetching unit (202), a second charging unit (203), a second signal-processing unit (204), a second antenna unit (205) and a storage unit (206). The first antenna unit (105) outputs the identification and sensing signals. The door lock (20) fetches and transmits the identification signal to the second micro-processing unit (201) to determine. The second micro-processing unit (201) responds to the first micro-processing unit (101) with a responsive identification signal. If the identification is successful, the sensing signal is converted into electricity, so the second charging unit (203) charges the storage unit (206).
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: June 27, 2017
    Assignee: JSW PACIFIC CORPORATION
    Inventor: Chih-Sheng Huang
  • Publication number: 20170149265
    Abstract: A lock wireless charging system includes a gateway (10) and a door lock (20). The gateway (10) includes a first micro-processing unit (101), a first signal-fetching unit (102), a first charging unit (103), a first signal-processing unit (104) and a first antenna unit (105). The door lock (20) includes a second micro-processing unit (201), a second signal-fetching unit (202), a second charging unit (203), a second signal-processing unit (204), a second antenna unit (205) and a storage unit (206). The first antenna unit (105) outputs the identification and sensing signals. The door lock (20) fetches and transmits the identification signal to the second micro-processing unit (201) to determine. The second micro-processing unit (201) responds to the first micro-processing unit (101) with a responsive identification signal. If the identification is successful, the sensing signal is converted into electricity, so the second charging unit (203) charges the storage unit (206).
    Type: Application
    Filed: November 19, 2015
    Publication date: May 25, 2017
    Inventor: Chih-Sheng HUANG
  • Patent number: 9092202
    Abstract: A mobile storage device is used for coupling to a host device via a communication interface. The mobile storage device receives power from the host device. The mobile storage device includes a substrate, a resistive circuit and a first integrated circuit. The substrate includes at least a first heat-dissipation slot. The resistive circuit is disposed around the first heat-dissipation slot of the substrate. The resistive circuit is coupled to a voltage source of the host device. The first integrated circuit is disposed on the substrate. The first integrated circuit is coupled to the resistive circuit, so as to receive power which is stepped-down by the resistive circuit.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: July 28, 2015
    Assignee: SK Hynix Inc.
    Inventor: Chih Sheng Huang
  • Publication number: 20140307381
    Abstract: A mobile storage device is used for coupling to a host device via a communication interface. The mobile storage device receives power from the host device. The mobile storage device includes a substrate, a resistive circuit and a first integrated circuit. The substrate includes at least a first heat-dissipation slot. The resistive circuit is disposed around the first heat-dissipation slot of the substrate. The resistive circuit is coupled to a voltage source of the host device. The first integrated circuit is disposed on the substrate. The first integrated circuit is coupled to the resistive circuit, so as to receive power which is stepped-down by the resistive circuit.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 16, 2014
    Applicant: INNOSTOR TECHNOLOGY CORPORATION
    Inventor: Chih Sheng HUANG
  • Publication number: 20130118783
    Abstract: A circuit board includes a first pinout set of USB 2.0 standard provided on the circuit board; a second pinout set provided on the circuit board; and a flexible metal strip having a jut and four pinouts corresponding to StdA_SSRX?, StdA_SSRX+, StdA_SSTX?, and StdA_SSTX+ of USB 3.0 standard.
    Type: Application
    Filed: March 26, 2012
    Publication date: May 16, 2013
    Inventor: Chih Sheng Huang
  • Publication number: 20060248239
    Abstract: A data processing system includes a storage device which stores data, a processor which processes application programs and generates decision signals, a bus switch which is coupled with the storage device and the processor, and a processing chip which is coupled with the bus switch, the storage device, and the processor. The data processing system takes advantage of functions of playing media and processing application programs, wherein the functions are designed together with the processing chip. It is more powerful for combining both the functions to increase efficiency of the processor than general data processing system.
    Type: Application
    Filed: August 16, 2005
    Publication date: November 2, 2006
    Inventors: Wen-Chin Lee, Chih-Sheng Huang