Patents by Inventor CHIH-SHENG TIAN

CHIH-SHENG TIAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for manufacturing semiconductor devices and structures thereof
    Patent number: 11183392
    Abstract: According to an embodiment of the present disclosure, a method of manufacturing semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer and exposing upper portion of the line-end cut pattern; reducing a width of the line-end cut pattern; etching the spacer layer to expose the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the reduced line-end cut pattern as an etch mask.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: November 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jiann-Horng Lin, Chao-Kuei Yeh, Ying-Hao Wu, Tai-Yen Peng, Chih-Hao Chen, Chih-Sheng Tian
  • METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES AND STRUCTURES THEREOF
    Publication number: 20200258754
    Abstract: According to an embodiment of the present disclosure, a method of manufacturing semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer and exposing upper portion of the line-end cut pattern; reducing a width of the line-end cut pattern; etching the spacer layer to expose the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the reduced line-end cut pattern as an etch mask.
    Type: Application
    Filed: April 28, 2020
    Publication date: August 13, 2020
    Inventors: JIANN-HORNG LIN, CHAO-KUEI YEH, YING-HAO WU, TAI-YEN PENG, CHIH-HAO CHEN, CHIH-SHENG TIAN
  • Method for manufacturing semiconductor devices and structures thereof
    Patent number: 10636667
    Abstract: A method of manufacturing a semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer on the line-end cut pattern; reducing a width of the line-end cut pattern; etching first horizontal portions of the spacer layer with the reduced line-end cut pattern as an etching mask; removing the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the etched line-end cut pattern as an etch mask.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: April 28, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jiann-Horng Lin, Chao-Kuei Yeh, Ying-Hao Wu, Tai-Yen Peng, Chih-Hao Chen, Chih-Sheng Tian
  • METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES AND STRUCTURES THEREOF
    Publication number: 20190157094
    Abstract: A method of manufacturing a semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer on the line-end cut pattern; reducing a width of the line-end cut pattern; etching first horizontal portions of the spacer layer with the reduced line-end cut pattern as an etching mask; removing the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the etched line-end cut pattern as an etch mask.
    Type: Application
    Filed: September 4, 2018
    Publication date: May 23, 2019
    Inventors: JIANN-HORNG LIN, CHAO-KUEI YEH, YING-HAO WU, TAI-YEN PENG, CHIH-HAO CHEN, CHIH-SHENG TIAN