Patents by Inventor Chih-Shien Lin

Chih-Shien Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961791
    Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Wen Hsiao, Ming-Da Cheng, Chih-Wei Lin, Chen-Shien Chen, Chih-Hua Chen, Chen-Cheng Kuo
  • Publication number: 20240090053
    Abstract: In one example in accordance with the present disclosure, an electronic device is described. The electronic device includes a wireless controller. The wireless controller is to establish a first wireless connection between the electronic device and a peripheral device to receive a unique identifier for a second electronic device. The wireless controller is also to establish, based on the unique identifier for the second electronic device, a second wireless connection between the electronic device and the second electronic device. The electronic device includes a wireless transceiver to wirelessly transfer data to the second electronic device through the second wireless connection.
    Type: Application
    Filed: February 2, 2021
    Publication date: March 14, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Chung-Chun Chen, Chen-Hui Lin, Chih-Ming Huang, Ming-Shien Tsai
  • Publication number: 20240079392
    Abstract: A semiconductor structure includes a first tier, a redistribution circuit structure, and a second tier. The first tier includes at least one first die. The redistribution circuit structure is disposed on the first tier and electrically coupled to the at least one first die, where the redistribution circuit structure has a multi-layer structure and includes a vertical connection structure continuously extending from a first side of the redistribution circuit structure to a second side of the redistribution circuit structure, and the first side is opposite to the second side along a stacking direction of the first tier and the redistribution circuit structure. The second tier includes a plurality of second dies, and is disposed on and electrically coupled to the redistribution circuit structure.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chuei-Tang WANG, Tso-Jung Chang, Jeng-Shien Hsieh, Shih-Ping Lin, Chih-Peng Lin, Chieh-Yen Chen, Chen-Hua Yu
  • Patent number: 11435597
    Abstract: A displaying device adapted to a screen is provided. The displaying device includes a transparent pyramid, a movable support, and an image conversion unit. The movable support is connected to the transparent pyramid to move the transparent pyramid between a first location and a second location which is different from the first location. The first location is the position on the screen. The image conversion unit is configured to receive image data. When the transparent pyramid moves to the first location, the image conversion unit converts the image data to a holographic image displayed on the screen, and the transparent pyramid generates a 3D hologram based on the holographic image.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: September 6, 2022
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Wen-Hao Hsieh, Kai-Ze Luo, Ming-Lung Lin, Yu-Chen Lee, Sheng-Yen Tseng, Yen-Hui Zheng, Kuan-Yi Lin, Chih-Shien Lin
  • Publication number: 20200220290
    Abstract: An electronic device includes a host and an apparatus. The host includes a controller, a signal transmission unit, and a connector. The controller is configured to generate a control signal. The signal transmission unit is electrically connected to the controller, to receive the control signal and generate a carrier to carry the control signal. The connector is configured to connect to the apparatus. The connector includes at least one of a power pin and a ground pin to transmit the carrier.
    Type: Application
    Filed: January 6, 2020
    Publication date: July 9, 2020
    Inventors: Wen-Yen CHEN, Chih-Shien LIN, Ming-Hung CHUNG, Shao-Lung CHANG
  • Publication number: 20200201067
    Abstract: A displaying device adapted to a screen is provided. The displaying device includes a transparent pyramid, a movable support, and an image conversion unit. The movable support is connected to the transparent pyramid to move the transparent pyramid between a first location and a second location which is different from the first location. The first location is the position on the screen. The image conversion unit is configured to receive image data. When the transparent pyramid moves to the first location, the image conversion unit converts the image data to a holographic image displayed on the screen, and the transparent pyramid generates a 3D hologram based on the holographic image.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 25, 2020
    Inventors: Wen-Hao HSIEH, Kai-Ze LUO, Ming-Lung LIN, Yu-Chen LEE, Sheng-Yen TSENG, Yen-Hui ZHENG, Kuan-Yi LIN, Chih-Shien LIN
  • Patent number: 8448011
    Abstract: A data processing system and an adjusting method thereof are disclosed. The data processing system includes a processor, a clock generator, a monitoring module and a determining module. When a target program is processed, the monitoring module monitors a first loading level of the processor, and transmits the first loading level to the determining module for recording. Furthermore, when a present program is processed, the monitoring module monitors a second loading level of the processor, and transmits the second loading level to the determining module. The determining module determines whether the second loading level matches with the first loading level within a preset period, and if it matches, the determining module generates and transmits a control signal to the clock generator, thereby making the clock generator generates a first clock signal to the processor, so as to increase the operating frequency of the processor.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: May 21, 2013
    Assignee: ASUSTeK Computer Inc.
    Inventors: Bing Min Lin, Chih Shien Lin, Chih Yung Peng
  • Patent number: 8386842
    Abstract: A computer system with a damaged BIOS data recovering function is disclosed. When BIOS data in the computer are damaged, the computer system may update and recover the BIOS of the storage unit of the computer system in a standby mode via an external electronic device (another computer or a USB flash disk). The computer system includes a storage unit, a data transferring interface, a power supply unit, and a control unit. The computer system is electrically connected with the external electronic device via the data transferring interface. The power supply unit provides standby power (in the standby mode) when the computer system is shut down. The control unit is electrically connected with the power supply unit and the data transferring interface, respectively. The control unit is actuated via the standby power, receives the external BIOS stored in the external electronic device.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: February 26, 2013
    Assignee: ASUSTeK Computer Inc.
    Inventor: Chih-Shien Lin
  • Patent number: 8296556
    Abstract: A method for processing booting failure of a computer system is adapted for being performed at a computer. The method includes the following steps. First, a parameter selecting signal is generated according to a triggering signal by a control module. Second, a driving parameter is chosen from a look-up table according to the parameter selecting signal by a basic input output system (BIOS), and the driving parameter is loaded into the BIOS and provided to a driving module. Third, a memory is driven according to the driving parameter by the driving module. Fourth, the driving parameter is stored by BIOS.
    Type: Grant
    Filed: January 7, 2010
    Date of Patent: October 23, 2012
    Assignee: ASUSTeK Computer Inc.
    Inventors: Chih-Shien Lin, Yi-Chun Tsai
  • Publication number: 20120144181
    Abstract: A motherboard and a method for displaying a host system parameter are provided. The motherboard includes a bridge circuit receiving the host system parameter, a microcontroller connected to the bridge circuit, and a transmitter connected to the microcontroller. The microcontroller is capable of directly capturing the host system parameter from the bridge circuit and then transmitting the system parameter to the transmitter when the motherboard is powered on.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 7, 2012
    Applicant: ASUSTek COMPUTER INC.
    Inventor: Chih-Shien Lin
  • Patent number: 8060785
    Abstract: A method for tuning memory parameter values and a computer system using the same are disclosed. In the invention, the computer system provides an embedded controller which may accumulate a counting value and send a reset signal to reboot the computer system. Firstly, the embedded controller reloads a memory parameter value corresponding to the counting value. Then, the computer system executes a memory test procedure. When the memory test procedure successes, a BIOS stores the memory parameter value. On the contrary, when the memory test procedure fails, the embedded controller accumulates the counting value and sends the reset signal to reboot the computer system. The BIOS reloading another memory parameter value corresponding to the accumulated counting value and re-executes the memory test procedure.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: November 15, 2011
    Assignee: ASUSTeK Computer Inc.
    Inventors: Chih-Shien Lin, Cheng-Hsun Li, Yi-Chun Tsai
  • Publication number: 20110022874
    Abstract: A data processing system and an adjusting method thereof are disclosed. The data processing system includes a processor, a clock generator, a monitoring module and a determining module. When a target program is processed, the monitoring module monitors a first loading level of the processor, and transmits the first loading level to the determining module for recording. Furthermore, when a present program is processed, the monitoring module monitors a second loading level of the processor, and transmits the second loading level to the determining module. The determining module determines whether the second loading level matches with the first loading level within a preset period, and if it matches, the determining module generates and transmits a control signal to the clock generator, thereby making the clock generator generates a first clock signal to the processor, so as to increase the operating frequency of the processor.
    Type: Application
    Filed: July 27, 2010
    Publication date: January 27, 2011
    Inventors: Bing Min LIN, Chih Shien Lin, Chih Yung Peng
  • Publication number: 20100318841
    Abstract: A method for tuning memory parameter values and a computer system using the same are disclosed. In the invention, the computer system provides an embedded controller which may accumulate a counting value and send a reset signal to reboot the computer system. Firstly, the embedded controller reloads a memory parameter value corresponding to the counting value. Then, the computer system executes a memory test procedure. When the memory test procedure successes, a BIOS stores the memory parameter value. On the contrary, when the memory test procedure fails, the embedded controller accumulates the counting value and sends the reset signal to reboot the computer system. The BIOS reloading another memory parameter value corresponding to the accumulated counting value and re-executes the memory test procedure.
    Type: Application
    Filed: June 7, 2010
    Publication date: December 16, 2010
    Applicant: ASUSTEK COMPUTER INC.
    Inventors: Chih-Shien Lin, Cheng-Hsun Li, Yi-Chun Tsai
  • Publication number: 20100299560
    Abstract: A computer system with a damaged BIOS data recovering function is disclosed. When BIOS data in the computer are damaged, the computer system may update and recover the BIOS of the storage unit of the computer system in a standby mode via an external electronic device (another computer or a USB flash disk). The computer system includes a storage unit, a data transferring interface, a power supply unit, and a control unit. The computer system is electrically connected with the external electronic device via the data transferring interface. The power supply unit provides standby power (in the standby mode) when the computer system is shut down. The control unit is electrically connected with the power supply unit and the data transferring interface, respectively. The control unit is actuated via the standby power, receives the external BIOS stored in the external electronic device.
    Type: Application
    Filed: April 27, 2010
    Publication date: November 25, 2010
    Inventor: Chih-Shien LIN
  • Publication number: 20100191950
    Abstract: A method for processing booting failure of a computer system is adapted for being performed at a computer. The method includes the following steps. First, a parameter selecting signal is generated according to a triggering signal by a control module. Second, a driving parameter is chosen from a look-up table according to the parameter selecting signal by a basic input output system (BIOS), and the driving parameter is loaded into the BIOS and provided to a driving module. Third, a memory is driven according to the driving parameter by the driving module. Fourth, the driving parameter is stored by BIOS.
    Type: Application
    Filed: January 7, 2010
    Publication date: July 29, 2010
    Applicant: ASUSTeK Computer Inc.
    Inventors: Chih-Shien Lin, Yi-Chun Tsai
  • Patent number: D611916
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: March 16, 2010
    Assignee: Asustek Computer Inc.
    Inventors: Chao-Chung Wu, Meng-Jia Guo, Chih-Shien Lin, Chien-Chin Wang, Yu-Chen Lee