Patents by Inventor Chih-Ting Hu
Chih-Ting Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240170046Abstract: A memory device, such as three dimension AND Flash memory, including a plurality of word line decoding circuit areas, a plurality of common power rails and a plurality of power drivers is provided. The word line decoding circuit areas are arranged in an array, and form a plurality of isolation areas, wherein each of the isolation areas is disposed between two adjacent word line decoding circuit areas. Each of the common power rails is disposed along the isolation areas. The power drivers respectively correspond to the word line decoding circuit areas. Each of the power drivers is disposed between each of the power driving circuit areas and each of the corresponding isolation areas, wherein each of the power drivers is configured to provide a common power to the word line decoding circuit areas.Type: ApplicationFiled: November 17, 2022Publication date: May 23, 2024Applicant: MACRONIX International Co., Ltd.Inventors: Teng-Hao Yeh, Hang-Ting Lue, Chih-Wei Hu
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Patent number: 11982866Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.Type: GrantFiled: December 15, 2022Date of Patent: May 14, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
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Patent number: 11985822Abstract: A memory device is provided. The memory device includes a stacked structure, a tubular element, a conductive pillar and memory cells. The tubular element includes a dummy channel layer and penetrates the stacked structure. The conductive pillar is enclosed by the tubular element and extending beyond a bottom surface of the dummy channel layer. The memory cells are in the stacked structure and electrically connected to the conductive pillar.Type: GrantFiled: September 2, 2020Date of Patent: May 14, 2024Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Teng-Hao Yeh, Chih-Wei Hu, Hang-Ting Lue, Guan-Ru Lee
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Publication number: 20240096781Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.Type: ApplicationFiled: March 20, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
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Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Publication number: 20240069299Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.Type: ApplicationFiled: November 9, 2023Publication date: February 29, 2024Inventors: Chao-Chang HU, Kuen-Wang TSAI, Liang-Ting HO, Chao-Hsi WANG, Chih-Wei WENG, He-Ling CHANG, Che-Wei CHANG, Sheng-Zong CHEN, Ko-Lun CHAO, Min-Hsiu TSAI, Shu-Shan CHEN, Jungsuck RYOO, Mao-Kuo HSU, Guan-Yu SU
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Publication number: 20230337421Abstract: Methods, systems and apparatus for managing capacitors in memory devices, e.g., three-dimensional (3D) memory devices are provided. In one aspect, a capacitor includes: a first terminal, a second terminal conductively insulated from the first terminal, and a capacitance structure that includes a plurality of layers sequentially stacked together. At least one layer includes: one or more first conductive parts and one or more second conductive parts that are conductively insulated in the layer, the one or more first conductive parts being conductively coupled to the first terminal, the one or more second conductive parts being conductively coupled to the second terminal. The at least one layer is configured such that at least one of the one or more second conductive parts forms at least one subordinate capacitor with at least one adjacent first conductive part.Type: ApplicationFiled: April 19, 2022Publication date: October 19, 2023Applicant: Macronix International Co., Ltd.Inventors: Jung-Chuan Ting, Chih-Ting Hu
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Patent number: 11195584Abstract: A flash memory device includes a memory string, a selection switch, a first power source and a second power source. The memory string has a plurality of memory cells. A first memory cell in the memory string is coupled to a first word line, and the first word line is selected to be a programmed word line and the first memory cell is selected to be an inhibited cell, during a first time period, the selection switch is turned on according to a selection signal, and the first power source pulls up voltages on the global bit line and the local bit line to a first voltage. During a second time period, the selection switch is turned-off according to the selection signal, a word line voltage on the first word line is pulled up to pump up the voltage on the local bit line to a second voltage.Type: GrantFiled: May 29, 2020Date of Patent: December 7, 2021Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventor: Chih-Ting Hu
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Publication number: 20210375369Abstract: A flash memory device includes a memory string, a selection switch, a first power source and a second power source. The memory string has a plurality of memory cells. A first memory cell in the memory string is coupled to a first word line, and the first word line is selected to be a programmed word line and the first memory cell is selected to be an inhibited cell, during a first time period, the selection switch is turned on according to a selection signal, and the first power source pulls up voltages on the global bit line and the local bit line to a first voltage. During a second time period, the selection switch is turned-off according to the selection signal, a word line voltage on the first word line is pulled up to pump up the voltage on the local bit line to a second voltage.Type: ApplicationFiled: May 29, 2020Publication date: December 2, 2021Applicant: MACRONIX International Co., Ltd.Inventor: Chih-Ting Hu
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Patent number: 10243454Abstract: A boost circuit includes a power rail to provide a supply voltage, a switch transistor controlling output of a boosted signal from a source of the switch transistor, and a timing and voltage control circuit configured to generate an equalization (EQ) signal to be applied to a gate of the switch transistor. The EQ waveform has a level being an EQ high level, an EQ low level lower than the EQ high level, or an EQ clamped level between the EQ low level and the EQ high level.Type: GrantFiled: June 28, 2016Date of Patent: March 26, 2019Assignee: Macronix International Co., Ltd.Inventors: Chih-Ting Hu, Shin-Jang Shen, Yi-Ching Liu
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Publication number: 20160308436Abstract: A boost circuit includes a power rail to provide a supply voltage, a switch transistor controlling output of a boosted signal from a source of the switch transistor, and a timing and voltage control circuit configured to generate an equalization (EQ) signal to be applied to a gate of the switch transistor. The EQ waveform has a level being an EQ high level, an EQ low level lower than the EQ high level, or an EQ clamped level between the EQ low level and the EQ high level.Type: ApplicationFiled: June 28, 2016Publication date: October 20, 2016Inventors: Chih-Ting HU, Shin-Jang SHEN, Yi-Ching LIU
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Patent number: 9423814Abstract: A power supply apparatus and a method for supplying power are provided. The method includes: providing a first power supply for outputting a first power signal; providing a second power supply for outputting a second power signal; and selectively charging the second power supply by using the first power supply.Type: GrantFiled: January 23, 2013Date of Patent: August 23, 2016Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Chih-Ting Hu, Chun-Hsiung Hung, Wu-Chin Peng, Kuen-Long Chang, Ken-Hui Chen
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Patent number: 9391597Abstract: A boost circuit includes a power rail to provide a supply voltage, a switch transistor controlling output of a boosted signal from a source of the switch transistor, and a timing and voltage control circuit configured to generate an equalization (EQ) signal to be applied to a gate of the switch transistor. The EQ waveform has a level being an EQ high level, an EQ low level lower than the EQ high level, or an EQ clamped level between the EQ low level and the EQ high level.Type: GrantFiled: November 12, 2013Date of Patent: July 12, 2016Assignee: Macronix International Co., Ltd.Inventors: Chih-Ting Hu, Shin-Jang Shen, Yi-Ching Liu
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Publication number: 20150131344Abstract: A boost circuit includes a power rail to provide a supply voltage, a switch transistor controlling output of a boosted signal from a source of the switch transistor, and a timing and voltage control circuit configured to generate an equalization (EQ) signal to be applied to a gate of the switch transistor. The EQ waveform has a level being an EQ high level, an EQ low level lower than the EQ high level, or an EQ clamped level between the EQ low level and the EQ high level.Type: ApplicationFiled: November 12, 2013Publication date: May 14, 2015Applicant: Macronix International Co., Ltd.Inventors: Chih-Ting Hu, Shin-Jang Shen, Yi-Ching Liu
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Patent number: 8595544Abstract: A method is described for performing an automatic internal trimming operation that can compensate process variation and supply voltage variation in an integrated circuit. A reference signal is applied when the integrated circuit is in an automatic internal trimming mode, and integrated circuit timing is trimmed into a predetermined target range after applying predefined reference cycles.Type: GrantFiled: January 30, 2013Date of Patent: November 26, 2013Assignee: Macronix International Co., Ltd.Inventors: Chih-Ting Hu, Ken-Hui Chen, Chun-Hsiung Hung
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Patent number: 8386829Abstract: A method is described for performing an automatic internal trimming operation that can compensate process variation and supply voltage variation in an integrated circuit. A reference signal is applied when the integrated circuit is in an automatic internal trimming mode, and integrated circuit timing is trimmed into a predetermined target range after applying predefined reference cycles.Type: GrantFiled: June 17, 2009Date of Patent: February 26, 2013Assignee: Macronix International Co., Ltd.Inventors: Chih-Ting Hu, Ken-Hui Chen, Chun-Hsiung Hung
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Patent number: 8374007Abstract: A power supply apparatus and a method for supplying power are provided. The apparatus, for use in a system having a first power signal, includes an assistance unit and a power supply device. The assistance unit outputs at least one maintaining signal according to the first power signal selectively. The power supply device outputs a second power signal, wherein the power supply device maintains the second power signal according to the at least one maintaining signal, for example, in an inactive state, such as an idle or standby state or other suitable timing.Type: GrantFiled: June 22, 2010Date of Patent: February 12, 2013Assignee: Macronix International Co., Ltd.Inventors: Chih-Ting Hu, Chun-Hsiung Hung, Chuan-Ying Yu, Wu-Chin Peng, Kuen-Long Chang, Ken-Hui Chen
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Publication number: 20110227552Abstract: A power supply apparatus and a method for supplying power are provided. The apparatus, for use in a system having a first power signal, includes an assistance unit and a power supply device. The assistance unit outputs at least one maintaining signal according to the first power signal selectively. The power supply device outputs a second power signal, wherein the power supply device maintains the second power signal according to the at least one maintaining signal, for example, in an inactive state, such as an idle or standby state or other suitable timing.Type: ApplicationFiled: June 22, 2010Publication date: September 22, 2011Applicant: MACRONIX INTERNATIONAL CO., LTD.Inventors: Chih-Ting Hu, Chun-Hsiung Hung, Chuan-Ying Yu, Wu-Chin Peng, Kuen-Long Chang, Ken-Hui Chen
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Publication number: 20100321101Abstract: A method is described for performing an automatic internal trimming operation that can compensate process variation and supply voltage variation in an integrated circuit. A reference signal is applied when the integrated circuit is in an automatic internal trimming mode, and integrated circuit timing is trimmed into a predetermined target range after applying predefined reference cycles.Type: ApplicationFiled: June 17, 2009Publication date: December 23, 2010Inventors: Chih-Ting Hu, Ken-Hui Chen, Chun-Hsiung Hung