Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first stack structure and a second stack structure in a first area over a substrate, wherein each of the stack structures includes semiconductor layers separated and stacked up; depositing a first interfacial layer around each of the semiconductor layers of the stack structures; depositing a gate dielectric layer around the first interfacial layer; forming a dipole oxide layer around the gate dielectric layer; removing the dipole oxide layer around the gate dielectric layer of the second stack structure; performing an annealing process to form a dipole gate dielectric layer for the first stack structure and a non-dipole gate dielectric layer for the second stack structure; and depositing a first gate electrode around the dipole gate dielectric layer of the first stack structure and the non-dipole gate dielectric layer of the second stack structure.

Abstract: A semiconductor device structure and methods of forming the same are described. The structure includes a gate dielectric layer disposed over a substrate, a gate electrode layer disposed over the gate dielectric layer, and a first gate spacer disposed adjacent the gate dielectric layer, wherein the first gate spacer comprises an inner surface facing the gate dielectric layer and an outer surface opposite the inner surface, and the first gate spacer includes an oxygen concentration that decreases from the inner surface towards the outer surface of the first gate spacer.

Abstract: In an embodiment, a method includes: depositing a gate dielectric layer on a first fin and a second fin, the first fin and the second fin extending away from a substrate in a first direction, a distance between the first fin and the second fin decreasing along the first direction; depositing a sacrificial layer on the gate dielectric layer by exposing the gate dielectric layer to a self-limiting source precursor and a self-reacting source precursor, the self-limiting source precursor reacting to form an initial layer of a material of the sacrificial layer, the self-reacting source precursor reacting to form a main layer of the material of the sacrificial layer; annealing the gate dielectric layer while the sacrificial layer covers the gate dielectric layer; after annealing the gate dielectric layer, removing the sacrificial layer; and after removing the sacrificial layer, forming a gate electrode layer on the gate dielectric layer.

Abstract: A semiconductor device includes a substrate. The semiconductor device includes a dielectric layer disposed over a portion of the substrate. The semiconductor device includes a diffusion blocking layer disposed over the dielectric layer. The diffusion blocking layer and the dielectric layer have different material compositions. The semiconductor device includes a ferroelectric layer disposed over the diffusion blocking layer.

Abstract: A method and apparatus for video coding are disclosed for the encoder side and the decoder side. According to the method for the decoder side, encoded data associated with a current block is received. A pseudo GPM in a target GPM group for the current block is determined. The current block is divided into one or more subblocks. Assigned MVs (Motion Vectors) of each subblock are determined according to the pseudo GPM. A cost for each GPM in the target GPM group is determined according to decoded data. A selected GPM is determined based on a mode syntax and a reordered target GPM group corresponding to the target GPM group reordered according to the costs, wherein the pseudo GPM is allowed to be different from the selected GPM. The encoded data is decoded using information comprising the selected GPM.

Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for analyzing embedding spaces using large language models. In one aspect, a method performed by one or more computers for analyzing a target embedding space using a neural network configured to perform a set of machine learning tasks is described. The method includes: obtaining, for each of one or more entities, a respective domain embedding representing the entity in the target embedding space; receiving a text prompt including a sequence of input tokens describing a particular machine learning task in the set to be performed on the one or more entities; preparing, for the neural network, an input sequence including each input token in the text prompt and each domain embedding; and processing the input sequence, using the neural network, to generate a sequence of output tokens describing a result of the particular machine learning task.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A semiconductor device includes a channel portion disposed on and spaced apart from a substrate, a gate dielectric which includes an upper dielectric region disposed on the channel portion, a first inner gate structure disposed between the substrate and the upper dielectric region, and an outer gate structure including an outer work-function portion and a cap portion. The outer work-function portion covers the upper dielectric region and the first inner gate structure. The cap portion covers the outer work-function portion in a way that the cap portion is separated from the first inner gate structure. The first inner gate structure includes a first work-function material and a conductive material that is different from the first work-function material. The outer work-function portion includes a second work-function material that is different from the conductive material.

Abstract: A frequency locked loop circuit, comprising an operational circuit, a first impedance circuit, a second impedance circuit, a switching circuit and a frequency generation circuit. The operational circuit is configured to output an operational signal according to a voltage difference between a positive terminal and a negative terminal. The switching circuit is configured to periodically conduct the negative terminal to one of the first impedance node and the second impedance node, and periodically conduct the positive terminal to the other one of the first impedance node and the second impedance node. The frequency generation circuit is configured to periodically sample the operational signal to generate a sample signal to generate a clock signal. An operational frequency of the operational signal is an integer multiple of a sampling frequency of the frequency generation circuit.

Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.

Abstract: Video encoding or decoding methods and apparatuses include receiving input data associated with a current block in a current picture, determining a preload region in a reference picture shared by two or more coding configurations of affine prediction or motion compensation or by two or more affine refinement iterations, loading reference samples in the preload region, generating predictors for the current block, and encoding or decoding the current block according to the predictors. The predictors associated with the affine refinement iterations or coding configurations are generated based on some of the reference samples in the preload region.

Abstract: An antenna-in-module includes a ground plate, three radiating elements, and two feed stubs. A first radiating element and a ground plate are arranged at an interval along a Z-axis and are disposed opposite to each other. The first radiating element and a second radiating element are arranged at an interval along an X-axis. A first gap between the first radiating element and the second radiating element extends along a Y-axis. A third radiating element and the second radiating element are arranged at an interval along the Z-axis and are disposed opposite to each other. At least a part of a first feed stub is disposed in a first aperture that includes space between the first gap and the ground plate. At least a part of a second feed stub is disposed in a second aperture that includes space between the second radiating element and the third radiating element.

Abstract: A SAR ADC includes: a sample-hold (S/H) circuit sampling an input voltage to generate a S/H output signal; a DAC generating a DAC output signal; a comparator comparing the DAC output signal with the S/H output signal to generate a comparison output signal; a SAR combinational digital circuit group; a multiplexer circuit; and a plurality of registers for registering the comparison output signal as register output signals and outputting as an output signal of the SAR ADC. The SAR combinational digital circuit group generates a plurality of first and second SAR output signals based on the register output signals. The multiplexer circuit is controlled by on the register output signals to select among the first and the second SAR output signals as a plurality of multiplexer output signals for sending to the DAC. A capacitor coupling relationship of the DAC is controlled by the multiplexer output signals.

Abstract: A method and apparatus for inter prediction in video coding system are disclosed. According to the method, one or more model parameters of one or more cross-color models for the second-color block are determined. Then, cross-color predictors for the second-color block are determined, wherein one cross-color predictor value for the second-color block is generated for each second-color pixel of the second-color block by applying said one or more cross-color models to corresponding reconstructed or predicted first-color pixels. The input data associated with the second-color block is encoded using prediction data comprising the cross-color predictors for the second-color block at the encoder side, or the input data associated with the second-color block is decoded using the prediction data comprising the cross-color predictors for the second-color block at the decoder side.

Abstract: A display may include an array of pixels such as light-emitting diode pixels. The pixels may include multiple circuitry decks that each include one or more circuit components such as transistors, capacitors, and/or resistors. The circuitry decks may be vertically stacked. Each circuitry deck may include a planarization layer formed from a siloxane material that conforms to underlying components and provides a planar upper surface. In this way, circuitry components may be vertically stacked to mitigate the size of each pixel footprint. The circuitry components may include capacitors that include both a high-k dielectric layer and a low-k dielectric layer. The display pixel may include a via with a width of less than 1 micron.

Abstract: An optical member driving mechanism is provided. The optical member driving mechanism includes a first movable portion used for connecting an optical element, a fixed portion, a first driving assembly used for driving the first movable portion to rotate relative to the fixed portion, and a guiding assembly having a first intermediate element. The first movable portion is movable relative to the fixed portion. The guiding assembly is used for applying a first stabilized force to the first movable portion for making the first intermediate element be in contact with the first movable portion or the fixed portion. The first movable portion is rotatable relative to the fixed portion.

Abstract: An integrated circuit includes a transistor having a plurality of stacked channels each extending between the source/drain regions of the transistor. The transistor also includes a hard mask nanostructure above the highest channel and extending between the source/drain regions of the transistor. A gate dielectric and gate metals wrap around the channels and the hard mask nanostructure.

Abstract: A method and apparatus for video coding are disclosed. According to the method for the decoder side, encoded data associated with a current block comprising a first-colour block and a second-colour block are received. An inherited model parameter set is determined from a previously coded block coded in a first CCLM related mode, wherein the inherited model parameter set comprises a first scaling parameter associated with the first CCLM related mode. A final inherited model parameter set is derived if an update value for the inherited model parameter set is determined, where the final inherited model parameter set is determined based on the first scaling parameter and the update value. Then, the encoded data associated with the second-colour block are decoded using prediction data based on an updated CCLM related model associated with the final inherited model parameter set. A method and apparatus for the encoder side are also disclosed.

Abstract: A power semiconductor device and a method of manufacturing a power semiconductor device is provided, including a shield gate trench (SGT) metal-oxide semiconductor field-effect transistor (MOSFET). The present disclosure provides for a MOSFET with a reduced charge between the gate conductive region and the drain or collector region, in order to improve the switching efficiency of the MOSFET.

Abstract: A method and apparatus for video coding are disclosed. According to the method for the decoder side, a first syntax, related to whether the current block is coded in a CCLM related mode, is parsed from a bitstream comprising the encoded data for the current block. If the first syntax indicates the current block being coded in the CCLM related mode, a second syntax is parsed from the bitstream, wherein the second syntax is related to whether a multiple model CCLM mode is used or whether one or more model parameters are explicitly signalled or implicitly derived. The model parameters for the second-colour block are determined if the first syntax indicates the current block being coded in a CCLM related mode. The encoded data associated with the second-colour block is then decoded using prediction data comprising the cross-colour predictor for the second-colour block.