Abstract: A method includes providing a substrate, forming a patterned hard mask layer over the substrate, etching the patterned hard mask layer to form a hole that penetrates the patterned hard mask layer, forming a barrier portion in the hole, removing the patterned hard mask layer, and forming a gate structure over the substrate. Formation of the gate structure includes forming a dielectric body portion on the substrate. The barrier portion that is thicker than the dielectric body portion adjoins one end of the dielectric body portion. The dielectric body portion and the barrier portion are collectively referred to as a gate dielectric layer. Formation of the gate structure further includes forming a gate electrode on the gate dielectric layer and forming gate spacers on opposite sidewalls of the gate electrode. During formation of the gate spacers, a portion of the barrier portion is removed to form a recessed corner.

Abstract: A backlight module includes a light source, a first prism sheet disposed on the light source, and a light type adjustment sheet disposed on a side of the first prism sheet away from the light source and including a base and multiple light type adjustment structures. The multiple light type adjustment structures are disposed on the first surface of the base. Each light type adjustment structure has a first structure surface and a second structure surface connected to each other. The first structure surface of each light type adjustment structure and the first surface of the base form a first base angle therebetween, and the second structure surface of each light type adjustment structure and the first surface of the base form a second base angle therebetween. The angle of the first base angle is different from the angle of the second base angle.

Abstract: The present disclosure is directed to techniques of zone-based target control in chemical mechanical polishing of wafers. Multiple zones are identified on a surface of a wafer. The CMP target is achieved on each zone in a sequence of CMP processes. Each CMP process in the sequence achieves the CMP target for only one zone, using a CMP process selective to other zones.

Abstract: A semiconductor structure is provided and includes a first gate structure, a second gate structure, and at least one local interconnect that extend continuously across a non-active region from a first active region to a second active region. The semiconductor structure further includes a first separation spacer disposed on the first gate structure and first vias on the first gate structure. The first vias are arranged on opposite sides of the first separation spacer are isolated from each other and apart from the first separation spacer by different distances.

Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.

Abstract: A chuck vacuum line of a semiconductor processing tool includes a first portion that penetrates a sidewall of a main pumping line of the semiconductor processing tool. The chuck vacuum line includes a second portion that is substantially parallel to the sidewall of the main pumping line and to a direction of flow in the main pumping line. A size of the second portion increases between an inlet end of the second portion and an outlet end of the second portion along the direction of flow in the main pumping line.

Abstract: A leak check is performed on a semiconductor wafer processing tool that includes a process chamber and process gas lines, and a semiconductor wafer is processed using the semiconductor wafer processing tool if the leak check passes. Each gas line includes a mass flow controller (MFC) and normally closed valves including an upstream and downstream valves upstream and downstream of the MFC. Leak checking includes: leak checking up to the downstream valves of the gas lines with the upstream valves closed and the downstream valves of the gas lines closed; and leak checking up to the upstream valve of each the process gas line with the upstream valves of the of the process gas lines closed and with the downstream valve of the of the process gas line being leak checked open and the downstream valve of every other process gas line closed.

Abstract: A casing structure of electronic device including a metal base plate, a transparent cathodic electrodeposition paints layer, and a transparent paints coating layer is provided. The metal base plate has brushed texture and high gloss surface. The transparent cathodic electrodeposition paints layer is disposed on the base metal base plate. The transparent paints coating layer is disposed on the transparent cathodic electrodeposition paints layer. A manufacturing method of casing structure of electronic device is also provided.

Abstract: A light emitting device controls its mixed CCT by the configuration of at least one light emitter, at least one diode and at least two power distribution components. The present disclosure is mainly based on the hardware design of diode and jumper, which effectively replaces the resistors and manual switches of the conventional light emitting device with diodes, wherein the resistors and the manual switches of the conventional light emitting device cause voltage instability and other problems. The present disclosure can achieve the demand for miniaturization of the light emitting device by plugging the jumper into pins, and further can achieve the main advantages of stabilizing the voltage of the overall light emitting device, thereby stabilizing the luminous performance of the overall light emitting device, and emitting the mixed light with the required CCT. The present disclosure also illustrates a lamp assembly using the aforementioned light emitting device.

Abstract: A light emitting device controls its mixed CCT by the configuration of at least one light emitter, at least one diode and at least two power distribution components. The present disclosure is mainly based on the hardware design of diode and jumper, which effectively replaces the resistors and manual switches of the conventional light emitting device with diodes, wherein the resistors and the manual switches of the conventional light emitting device cause voltage instability and other problems. The present disclosure can achieve the demand for miniaturization of the light emitting device by plugging the jumper into pins, and further can achieve the main advantages of stabilizing the voltage of the overall light emitting device, thereby stabilizing the luminous performance of the overall light emitting device, and emitting the mixed light with the required CCT. The present disclosure also illustrates a lamp assembly using the aforementioned light emitting device.

Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a key generation circuitry and a key-error detection circuitry. The key generation circuitry is arranged operably to realize a key expansion operation for generating multiple round keys based on a root key in an encryption algorithm, where the encryption algorithm encodes plaintext or an intermediate encryption result with one round key in a corresponding round. The error detection circuitry is arranged operably to: calculate redundant data corresponding to each round key; and output an error signal to a processing unit when finding that any round key does not match corresponding redundant data at a check point during the key expansion operation.

Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes an encoding circuitry and an error detection circuitry. The encoding circuitry is arranged operably to realize an encryption algorithm including multiple rounds, in which of each round encodes plaintext or an intermediate encryption result with a round key. The error detection circuitry is arranged operably to: calculate redundant data corresponding to the intermediate encryption result; and output an error signal to a processing unit when finding that the intermediate encryption result does not match the redundant data at a check point during an encryption process.

Abstract: A multi-input multi-output adder and an operating method thereof are proposed. The multi-input multi-output adder includes an adder circuitry configured to perform an operation. The operation includes the following. A first source operand and a second source operand are added to generate a first summed operand. Direct truncation is performed on at least one last bit of the first summed operand to generate a first truncated-summed operand. Right shift is performed on the first truncated-summed operand to generate a first shifted-summed operand. A bit number of the right shift of the first truncated-summed operand is equal to a bit number of the direct truncation of the first summed operand.

Abstract: A device for liveness detection is disclosed. The liveness detecting device has a simplest structure that principally comprises a light sensing unit and a signal processing module. Particularly, the signal processing module is configured for having a physiological feature extracting unit and a liveness detecting unit therein. The physiological feature extracting unit is adopted for extracting a first physiological feature from a PPG signal, or extracting a second physiological feature from the PPG signal that has been applied with a signal process. As such, through the first and second physiological features, the liveness detecting unit is able to determine whether a subject is a living body or not. The liveness detecting device does not use any camera unit and iPPG technology, such that the liveness detecting device has advantages of simple structure, low cost and immediately completing liveness detection.

Abstract: A light emitting device controls its mixed CCT by the configuration of at least one light emitter, at least one diode and at least two power distribution components. The present disclosure is mainly based on the hardware design of diode and jumper, which effectively replaces the resistors and manual switches of the conventional light emitting device with diodes, wherein the resistors and the manual switches of the conventional light emitting device cause voltage instability and other problems. The present disclosure can achieve the demand for miniaturization of the light emitting device by plugging the jumper into pins, and further can achieve the main advantages of stabilizing the voltage of the overall light emitting device, thereby stabilizing the luminous performance of the overall light emitting device, and emitting the mixed light with the required CCT. The present disclosure also illustrates a lamp assembly using the aforementioned light emitting device.

Abstract: A full covered wind outlet device and a matrix wind generation system is disclosed, which is disposed on a protected space, and comprises an air supply matrix and an air exhaust matrix. The air supply matrix is composed by a plurality of full covered wind outlet devices, disposed on a top surface of the protected space. The air exhaust matrix is composed by a plurality of full-covered air exhaust devices, disposed on a bottom surface of the protected space.

Abstract: A wind barrier generation system with protective function and a method of generating protective air pressure difference, applied to a protected space, the wind barrier generation system includes a person identification system, a matrix wind field generation system, a filter system, and a wind field control system. The wind field control system calculates a wind field control range parameter based on a person range coordinate transmitted from the person identification system, and maps the wind field control range parameter to the matrix wind field generation system to select a first range circle, and outputs a wind field control command to a matrix wind field generation system, to control wind speeds of the first range circle to be different from that of the other part in the matrix wind field generation system, thereby forming a protective wind barrier on the detected person.

Abstract: A peripheral wind outlets device and a matrix wind generation system is disclosed, which is disposed on a protected space, and comprises an air supply matrix and an air exhaust matrix. The air supply matrix is composed by a plurality of peripheral wind outlets devices, disposed on a top surface of the protected space. The air exhaust matrix is composed by a plurality of peripheral air exhaust devices, disposed on a bottom surface of the protected space.

Abstract: A device for liveness detection is disclosed. The liveness detecting device has a simplest structure that principally comprises a light sensing unit and a signal processing module. Particularly, the signal processing module is configured for having a physiological feature extracting unit and a liveness detecting unit therein. The physiological feature extracting unit is adopted for extracting a first physiological feature from a PPG signal, or extracting a second physiological feature from the PPG signal that has been applied with a signal process. As such, through the first and second physiological features, the liveness detecting unit is able to determine whether a subject is a living body or not. The liveness detecting device does not use any camera unit and iPPG technology, such that the liveness detecting device has advantages of simple structure, low cost and immediately completing liveness detection.