Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.

Abstract: An ear canal clamp for small animals includes a base and a clamping mechanism. The clamping mechanism includes two clamping arms movably mounted on the base, a biasing member mounted on the base and constrained between the clamping arms, and two ear canal positioning members mounted respectively to the clamping arms and facing each other. The clamping arms are configured to move toward each other and compress the biasing member to increase the distance between the ear canal positioning members. A biasing force generated by the biasing member when compressed is used to push the clamping arms to move oppositely with respect to each other.

Abstract: A system for manufacturing an integrated circuit includes a processor coupled to a non-transitory computer readable medium configured to store executable instructions. The processor is configured to execute the instructions for generating a layout design of the integrated circuit that has a set of design rules. The generating of the layout design includes generating a set of gate layout patterns corresponding to fabricating a set of gate structures of the integrated circuit, generating a cut feature layout pattern corresponding to a cut region of a first gate of the set of gate structures of the integrated circuit, generating a first conductive feature layout pattern corresponding to fabricating a first conductive structure of the integrated circuit, and generating a first via layout pattern corresponding to a first via. The cut feature layout pattern overlaps a first gate layout pattern of the set of gate layout patterns.

Abstract: A semiconductor structure is provided and includes a first gate structure, a second gate structure, and at least one local interconnect that extend continuously across a non-active region from a first active region to a second active region. The semiconductor structure further includes a first separation spacer disposed on the first gate structure and first vias on the first gate structure. The first vias are arranged on opposite sides of the first separation spacer are isolated from each other and apart from the first separation spacer by different distances.

Abstract: A head cap with channel identification includes a head cap, channel identification module, a controlling module, and electrical stimulation modules. The head cap includes the channels therein, and the head cap includes brain regions corresponding to the brain areas of the human being. The electrical stimulation modules disposed in the channels, and the channel identification modules disposed around the peripheral of the channels. The controlling module is electrically coupled to the channel identification modules. When the electrical stimulation modules disposed in some of the channels, the channel identification modules around the peripheral of the channels and the electrical stimulation module are constituted a circuit conduction status or a short circuit status, then the channel identification module transmits a signal to the controlling module to determine the desired sites of the electrical stimulation module where is corresponding to one of the brain areas of the human being according to the signal.

Abstract: The present disclosure provides a package structure having a photonic integrated circuit, the package structure includes a substrate, a chip and an optical module. The chip has an optical waveguide structure and a recessed portion. The optical waveguide structure is adjacent to the recessed portion. The recessed portion faces the substrate, and the chip is engaged to the substrate by flip chip. The optical module is provided in the recessed portion of the chip.

Abstract: A head cap with channel identification includes a head cap, channel identification module, a controlling module, and electrical stimulation modules. The head cap includes the channels therein, and the head cap includes brain regions corresponding to the brain areas of the human being. The electrical stimulation modules disposed in the channels, and the channel identification modules disposed around the peripheral of the channels. The controlling module is electrically coupled to the channel identification modules. When the electrical stimulation modules disposed in some of the channels, the channel identification modules around the peripheral of the channels and the electrical stimulation module are constituted a circuit conduction status or a short circuit status, then the channel identification module transmits a signal to the controlling module to determine the desired sites of the electrical stimulation module where is corresponding to one of the brain areas of the human being according to the signal.

Abstract: The invention provides transcranial electrostimulation by combining transcranial direct current stimulation (tDCS) and theta burst stimulation (TBS) to achieve an unexpected therapeutic effect in various brain or neural diseases. Accordingly, the invention provides a mode of direct current with biphasic square wave pulses in the treatment of brain or neural diseases. Also provided are methods of employing the transcranial electrostimulation of the invention and applications of the transcranial electrostimulation of the invention.

Abstract: The invention provides transcranial electrostimulation by combining transcranial direct current stimulation (tDCS) and theta burst stimulation (TBS) to achieve an unexpected therapeutic effect in various brain or neural diseases. Accordingly, the invention provides a mode of direct current with biphasic square wave pulses in the treatment of brain or neural diseases. Also provided are methods of employing the transcranial electrostimulation of the invention and applications of the transcranial electrostimulation of the invention.

Abstract: The present invention relates to an anticorrosion layer and a manufacturing method thereof, wherein the anticorrosion layer is capable of being coated onto the surface of a substrate for preventing the substrate surface from corrosion, the anticorrosion layer comprises: a polymer material layer, coated on the substrate surface; and a continuous rough surface layer, formed on the surface of the polymer material layer, wherein the continuous rough surface layer has a surface roughness great than 10 nm. Moreover, through the manufacturing method, a protective layer (the anticorrosion layer) with excellent anticorrosion efficiency and low pollution property can be rapidly and massively formed on the substrate surface by way of using a replica mold.

Abstract: A document property detecting includes a circuit comprising a first electrode and a plurality of second electrodes, a transparent conductive substrate electrically connected to the first electrode for loading a document, and a cover with a plurality of conductive media electrically connected to the second electrodes, respectively.

Abstract: A document property detecting includes a circuit comprising a first electrode and a plurality of second electrodes, a transparent conductive substrate electrically connected to the first electrode for loading a document, and a cover with a plurality of conductive media electrically connected to the second electrodes, respectively.

Abstract: In a process for producing nanocarbon materials, a metal reducing agent and a carbon source are subjected to a chemical reduction reaction under an atmosphere which will not interfere with the reaction and at a temperature preferably lower than 1000° C., such that a nanocarbon material having a graphite-like structure is formed therefrom. Optionally, an additive, e.g. a fullerene compound, or a porous substrate such as zeolite powder, may be used during the production of the nanocarbon material.