Patents by Inventor CHIH-WEI SHIH

CHIH-WEI SHIH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136293
    Abstract: Provided are a package structure having a joint structure and a method of forming the same. The package structure includes: a first under bump metallurgy (UBM) structure disposed on a first dielectric layer, wherein the first UBM structure at least comprises: a barrier layer embedded in the first dielectric layer; and an upper metal layer disposed over the barrier layer, wherein a sidewall of the barrier layer is laterally offset outward from a sidewall of the upper metal layer, and a portion of a top surface of the barrier layer is exposed by the first dielectric layer; and a solder layer disposed on the first UBM structure and contacting the upper metal layer.
    Type: Application
    Filed: January 31, 2023
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wei Wu, Wen-Chih Chiou, Ying-Ching Shih
  • Publication number: 20240128211
    Abstract: Some implementations described herein provide techniques and apparatuses for a stacked semiconductor die package. The stacked semiconductor die package may include an upper semiconductor die package above a lower semiconductor die package. The stacked semiconductor die package includes one or more rows of pad structures located within a footprint of a semiconductor die of the lower semiconductor die package. The one or more rows of pad structures may be used to mount the upper semiconductor die package above the lower semiconductor die package. Relative to another stacked semiconductor die package including a row of dummy connection structures adjacent to the semiconductor die that may be used to mount the upper semiconductor die package, a size of the stacked semiconductor die package may be reduced.
    Type: Application
    Filed: April 27, 2023
    Publication date: April 18, 2024
    Inventors: Chih-Wei WU, An-Jhih SU, Hua-Wei TSENG, Ying-Ching SHIH, Wen-Chih CHIOU, Chun-Wei CHEN, Ming Shih YEH, Wei-Cheng WU, Der-Chyang YEH
  • Patent number: 11960085
    Abstract: A manufacturing method of a waveguide and a head mounted display device having the waveguide are provided. The head mounted display device includes a display unit, a first waveguide and a second waveguide. The display unit is configured to provide an image beam. The first waveguide is located between the display unit and the second waveguide. The first waveguide is configured to transmit the image beam to the second waveguide and adjust a light shape of the image beam to maintain a field angle and expand a pupil in a single dimension. The second waveguide is configured to transmit the image beam to outside of the head mounted display device, and the second waveguide can extend a light transmission path and provide a uniform image beam.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: April 16, 2024
    Assignee: Coretronic Corporation
    Inventors: Chih-Wei Shih, Hung-Ta Chien
  • Patent number: 11953052
    Abstract: A fastener is adapted for assembling a first housing to a second housing. The first housing is provided with a protruding portion and a buckling portion, and the second housing has a first surface, a second surface, and a through hole. The fastener includes a first portion, at least one connecting portion, at least two elastic portions, and a second portion. The first portion movably abuts against the first surface and has a first opening. The connecting portion is accommodated in the through hole. One end of the connecting portion is connected to the first portion. The connecting portion is spaced apart from an inner edge of the second housing by a gap. The two elastic portions inclinedly extend into the first opening. The second portion movably abuts against the second surface and is disposed at the another end of the connecting portion.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Jian-Hua Chen, Po-Tsung Shih, Yu-Wei Lin, Ming-Hua Ho, Chih-Hao Wu
  • Patent number: 11955459
    Abstract: A package structure is provided. The package structure includes a first die and a second die, a dielectric layer, a bridge, an encapsulant, and a redistribution layer structure. The dielectric layer is disposed on the first die and the second die. The bridge is electrically connected to the first die and the second die, wherein the dielectric layer is spaced apart from the bridge. The encapsulant is disposed on the dielectric layer and laterally encapsulating the bridge. The redistribution layer structure is disposed over the encapsulant and the bridge. A top surface of the bridge is in contact with the RDL structure.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Hang Liao, Chih-Wei Wu, Jing-Cheng Lin, Szu-Wei Lu, Ying-Ching Shih
  • Publication number: 20240105701
    Abstract: A package structure and methods for forming the package structure are provided. The package structure includes a package component, an encapsulant disposed around the package component, and a redistribution structure disposed over the package component and the encapsulant. The package component includes a substrate, a protection structure, which includes an organic material, over a first surface of the substrate, and a multi-layered structure encapsulated by the protection structure. Sidewalls of the multi-layered structure are spaced apart from the encapsulant by the protection structure.
    Type: Application
    Filed: January 11, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wei Wu, Ying-Ching Shih, Wen-Chih Chiou
  • Publication number: 20240107780
    Abstract: A system on chip (SoC) die package is attached to a redistribution structure of a semiconductor device package such that a top surface of the SoC die package is above a top surface of an adjacent memory die package. This may be achieved through the use of various attachment structures that increase the height of the SoC die package. After encapsulating the memory die package and the SoC die package in an encapsulation layer, the encapsulation layer is grinded down. The top surface of the SoC die package being above the top surface of the adjacent memory die package results in the top surface of the SoC die package being exposed through the encapsulation layer after the grinding operation. This enables heat to be dissipated through the top surface of the SoC die package.
    Type: Application
    Filed: January 5, 2023
    Publication date: March 28, 2024
    Inventors: Chih-Wei WU, Ying-Ching SHIH, Wen-Chih CHIOU, An-Jhih SU, Chia-Nan YUAN
  • Publication number: 20240096848
    Abstract: A method of manufacturing a semiconductor device includes forming a first bonding layer over a substrate of a first wafer, the first wafer including a first semiconductor die and a second semiconductor die, performing a first dicing process to form two grooves that extend through the first bonding layer, the two grooves being disposed between the first semiconductor die and the second semiconductor die, performing a second dicing process to form a trench that extends through the first bonding layer and partially through the substrate of the first wafer, where the trench is disposed between the two grooves, and thinning a backside of the substrate of the first wafer until the first semiconductor die is singulated from the second semiconductor die.
    Type: Application
    Filed: January 4, 2023
    Publication date: March 21, 2024
    Inventors: Chih-Wei Wu, Ching-Feng Yang, Ying-Ching Shih, An-Jhih Su, Wen-Chih Chiou
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240071855
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure, a backside dielectric layer, conductive terminals, an electronic device, and an underfill is provided. The semiconductor die laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes redistribution conductive layers and thermal enhancement structures electrically insulated from the redistribution conductive layers, and the thermal enhancement structures are thermally coupled to the semiconductor die. The backside dielectric layer is disposed on the redistribution circuit structure. The conductive terminals penetrate through the backside dielectric layer. The electronic device is disposed over the backside dielectric layer and electrically connected to the redistribution circuit structure through the conductive terminals.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wei Wu, Ying-Ching Shih, Wen-Chih Chiou
  • Publication number: 20230359063
    Abstract: An integrated stereoscopic image display device is provided. The integrated stereoscopic image display device includes a display, a lens array layer, and a baffle layer. The display has a display surface and an image computing unit, and the lens array layer is disposed adjacent to the display surface. The baffle layer includes a plurality of baffles that extend along a first inclined direction, and each of the baffles has a rotation angle. The baffles are inclined to the display surface and extend along a second inclined direction, and each of the baffles has an inclination angle.
    Type: Application
    Filed: September 26, 2022
    Publication date: November 9, 2023
    Inventors: CHIH-HUNG TING, WEI-AN CHEN, HSIN-YOU HOU, CHIH-WEI SHIH, KUAN-YU CHEN
  • Patent number: 11774755
    Abstract: A near-eye optical system, for receiving an image beam, includes an optical waveguide, configured to expand the image beam in a direction, and including a near-eye surface and a structure surface. The structure surface includes a light incident area and is opposite to the near-eye surface. The light incident area is located in a transmission path of the image beam. A plurality of reflective inclined surfaces are disposed on the structure surface and located at one side of the light incident surface and arranged along the direction. The structure surface is sequentially divided into the light incident area and a plurality of optical areas along the direction. A line number density of the reflective inclined surfaces in the optical area closest to the light incident area in the direction is less than a line number density of the reflective inclined surfaces in the optical area furthest from the light incident area in the direction.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: October 3, 2023
    Assignee: Coretronic Corporation
    Inventors: Kuei-En Peng, Chih-Wei Shih, Hung-Ta Chien
  • Patent number: 11655955
    Abstract: The present invention provides a vehicle lamp structure, which includes a base, a circuit board, at least one first light-emitting element, a ring block, a first optical element and an optical cover. The circuit board is disposed above the base. The first light-emitting element is disposed on a top surface of the circuit board. The ring block is disposed above the circuit board. The first optical element is disposed above the first light-emitting element. The optical cover hoods the first optical element. Wherein, the ring block surrounds the first light-emitting element, and the first optical element and the optical cover are spaced by a distance.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: May 23, 2023
    Assignee: Min Hsiang Corporation
    Inventors: Shang-Kuei Tai, Ying-Fang Tseng, Tung-Sheng Hsieh, Chih-Wei Shih
  • Patent number: 11644673
    Abstract: A near-eye optical system receiving an image beam including a first optical waveguide is provided. The first optical waveguide expands the image beam in a first direction and includes first and second surfaces, first and second beam-splitting surfaces, and a plurality of first and second reflective inclined surfaces. The first and second beam-splitting surfaces are located in the first optical waveguide and disposed in a tilted manner relative to the first and second surfaces. The first and second beam-splitting surfaces have opposite tilt directions. The first and second beam-splitting surfaces receive an image beam incident from the first surface so that a first portion of the image beam passes through and a second portion of the image beam is reflected. The near-eye optical system further reduces a thickness of the optical waveguide and alleviates the issue that the image beam is not completely projected to the optical waveguide.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: May 9, 2023
    Assignee: Coretronic Corporation
    Inventor: Chih-Wei Shih
  • Publication number: 20220360762
    Abstract: A stereoscopic image display device capable of reducing grid visual effect includes a flat display unit, a light source unit disposed on a side of the flat display unit, and a lens array unit disposed on another side of the flat display unit. A light source provided by the light source unit satisfies an optical characteristic as follows: an attenuation amplitude of a luminance of the light source before entering the lens array unit being not greater than 65% within a divergence angle of a light field system of the stereoscopic image display device, thereby reducing the grid visual effect of a stereo image generated by the stereoscopic image display device.
    Type: Application
    Filed: August 17, 2021
    Publication date: November 10, 2022
    Inventors: CHUN-HSIANG YANG, CHIH-HUNG TING, KAI-CHIEH CHANG, HSIN-YOU HOU, WEI-AN CHEN, KUAN-YU CHEN, CHIH-WEI SHIH
  • Patent number: 11483541
    Abstract: A stereoscopic image display device capable of reducing grid visual effect includes a flat display unit, a light source unit disposed on a side of the flat display unit, and a lens array unit disposed on another side of the flat display unit. A light source provided by the light source unit satisfies an optical characteristic as follows: an attenuation amplitude of a luminance of the light source before entering the lens array unit being not greater than 65% within a divergence angle of a light field system of the stereoscopic image display device, thereby reducing the grid visual effect of a stereo image generated by the stereoscopic image display device.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: October 25, 2022
    Assignee: Lixel Inc.
    Inventors: Chun-Hsiang Yang, Chih-Hung Ting, Kai-Chieh Chang, Hsin-You Hou, Wei-An Chen, Kuan-Yu Chen, Chih-Wei Shih
  • Publication number: 20220317465
    Abstract: A method for rendering data of a three-dimensional image adapted to an eye position and a display system are provided. The method is used to render the three-dimensional image to be displayed in a three-dimensional space. In the method, a three-dimensional image data used to describe the three-dimensional image is obtained. The eye position of a user is detected. The ray-tracing information between the eye position and each lens unit of a multi-optical element module forms a region of visibility (RoV) that may cover a portion of the three-dimensional image in the three-dimensional space. When coordinating the physical characteristics of a display panel and the multi-optical element module, a plurality of elemental images can be obtained. The elemental images form an integral image that records the three-dimensional image data adapted to the eye position, and the integral image is used to reconstruct the three-dimensional image.
    Type: Application
    Filed: July 8, 2021
    Publication date: October 6, 2022
    Inventors: CHUN-HSIANG YANG, CHIH-HUNG TING, KAI-CHIEH CHANG, HSIN-YOU HOU, CHIH-WEI SHIH, WEI-AN CHEN, KUAN-YU CHEN
  • Patent number: 11269184
    Abstract: A HMD device including a display, a first waveguide element and a second waveguide element is provided. The first waveguide element comprises a first light incident surface, a first light emerging surface and a plurality of first light splitting elements. An image beam is incident to the first waveguide element through the first light incident surface, and leaves the first waveguide element through the first light emerging surface. The second waveguide element comprises a second light incident surface, a second light emerging surface and a plurality of second light splitting elements. The image beam is incident to the second waveguide element through the second light incident surface. The image beam leaves through the second light emerging surface and is projected to the projection target. A reflectivity of the Nth one of the second light splitting elements is smaller than or equal to a reflectivity of the (N+1)th one of the second light splitting elements.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: March 8, 2022
    Assignee: Coretronic Corporation
    Inventors: Chih-Wei Shih, Yi Hung, Chuan-Te Cheng
  • Publication number: 20220066216
    Abstract: A manufacturing method of waveguide and a head mounted display device having the waveguide are provided. The head mounted display device is configured to be placed in front of at least one eye of a user, and includes a display unit, the first waveguide and the second waveguide. The display unit is configured to provide an image beam. The first waveguide is located between the display unit and the second waveguide. The first waveguide is configured to transmit the image beam to the second waveguide and adjust a light shape of the image beam to maintain a field angle and expand a pupil in a single dimension. The second waveguide is configured to transmit the image beam to the at least eye of the user, and the second waveguide can extend a light transmission path and provide a uniform image beam.
    Type: Application
    Filed: August 26, 2021
    Publication date: March 3, 2022
    Applicant: Coretronic Corporation
    Inventors: Chih-Wei Shih, Hung-Ta Chien
  • Patent number: 11119325
    Abstract: A near eye display device includes a display and a first waveguide element, the first waveguide element including a light incoming surface, a light exiting surface, a reflective inclined surface and beam splitting elements. An image beam provided by the display enters the first waveguide element via the light incoming surface and is reflected by the reflective inclined surface in the first waveguide element to the beam splitting elements, and is split by the beam splitting elements and leaves the first waveguide element via the light exiting surface. The reflective inclined surface has a first reflectivity distribution in a first incident angle range and a second reflectivity distribution in a second incident angle range. An angle in the second incident angle range is greater than an angle in the first incident angle range, and the first reflectivity distribution has a greater reflectivity average value than the second reflectivity distribution.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: September 14, 2021
    Assignee: Coretronic Corporation
    Inventors: Chih-Wei Shih, Chung-Ting Wei, Chuan-Te Cheng