Abstract: A cell site device and an associated clock synchronization method are provided. The cell site device includes a clock synchronizer, a first processing circuit, and a second processing circuit. The clock synchronizer generates a first operation clock and a second operation clock. The first operation clock and the second operation clock have a specific synchronous relationship, and the clock synchronizer is adjusted by a synchronizer setting signal. The first processing circuit generates the synchronizer setting signal according to one of an external clock synchronization source and an internal clock signal. The clock synchronizer respectively transmits the first operation clock and the second operation clock to the first processing circuit and the second processing circuit. The first processing circuit generates a cross-unit periodic synchronization signal and transmits the cross-unit periodic synchronization signal to the second processing circuit.

Abstract: A manufacturing method of a semiconductor structure including the following steps is provided. A first substrate is provided. A first dielectric structure is formed on the first substrate. At least one first cavity is formed in the first dielectric structure. A first stress adjustment layer is formed in the first cavity. The first stress adjustment layer covers the first dielectric structure. A second substrate is provided. A second dielectric structure is formed on the second substrate. At least one second cavity is formed in the second dielectric structure. A second stress adjustment layer is formed in the second cavity. The second stress adjustment layer covers the second dielectric structure. The first stress adjustment layer and the second stress adjustment layer are bonded.

Abstract: A semiconductor includes a substrate. A gate structure is disposed on the substrate. A liner oxide contacts a side of the gate structure. A silicon oxide spacer contacts the liner oxide. An end of the silicon oxide spacer forms a kink profile. A silicon nitride spacer contacts the silicon oxide spacer and a tail of the silicon nitride spacer covers part of the kink profile. A stressor covers the silicon nitride spacer and the substrate.

Abstract: A nano-FET and a method of forming is provided. In some embodiments, a nano-FET includes an epitaxial source/drain region contacting ends of a first nanostructure and a second nanostructure. The epitaxial source/drain region may include a first semiconductor material layer of a first semiconductor material, such that the first semiconductor material layer includes a first segment contacting the first nanostructure and a second segment contacting the second nanostructure, wherein the first segment is separated from the second segment. A second semiconductor material layer is formed over the first segment and the second segment. The second semiconductor material layer may include a second semiconductor material having a higher concentration of dopants of a first conductivity type than the first semiconductor material layer. The second semiconductor material layer may have a lower concentration percentage of silicon than the first semiconductor material layer.

Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.

Abstract: A chip package structure includes a circuit substrate, a lead frame, a first chip, a second chip, a connecting member, and a package body. The lead frame is stacked on the circuit substrate, and the lead frame is bent to form an accommodating space. The first chip is disposed on the lead frame and located in the accommodating space. The second chip is disposed on the circuit substrate and located in the accommodating space. The connecting member is used to connect the lead frame and the circuit substrate. The package body is disposed on the circuit substrate and covers the first chip, the second chip, and the lead frame.

Abstract: A solar cell module includes a first substrate, a second substrate, at least one cell unit, a first packaging film, a second packaging film, a first protective layer, a second protective layer, and a plurality of support members. The first substrate and the second substrate are disposed opposite to each other. The cell unit is disposed between the first substrate and the second substrate. The first packaging film is disposed between the cell unit and the first substrate. The second packaging film is disposed between the cell unit and the second substrate. The first protective layer is disposed between the cell unit and the first packaging film. The second protective layer is disposed between the cell unit and the second packaging film. The support members are respectively disposed between the first packaging film and the second packaging film and surround at least two opposite sides of the cell unit.

Abstract: Semiconductor devices having improved source/drain features and methods for fabricating such are disclosed herein. An exemplary device includes a semiconductor layer stack disposed over a mesa structure of a substrate. The device further includes a metal gate disposed over the semiconductor layer stack and an inner spacer disposed on the mesa structure of the substrate. The device further includes a first epitaxial source/drain feature and a second epitaxial source/drain feature where the semiconductor layer stack is disposed between the first epitaxial source/drain feature and the second epitaxial source/drain feature. The device further includes a void disposed between the inner spacer and the first epitaxial source/drain feature.

Abstract: An embodiment is a device including a first die and a substrate including a first surface and a second surface opposite the first surface. The device also includes an active device on the first surface of the substrate. The device also includes a first interconnect structure on the first surface of the substrate. The device also includes a through substrate via extending through the first interconnect structure and the substrate to the second surface of the substrate, the through substrate via being electrically coupled to metallization patterns in the first interconnect structure. The device also includes one or more material-filled trench structures extending from the second surface of the substrate into the substrate, the one or more material-filled trench structures being electrically isolated from the through substrate via.

Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.

Abstract: A data retransmission method includes configuring the quantity of code block groups in a transport block and configuring a plurality of physical resource groups; configuring the quantity of physical resources included in each of the physical resource groups according to the different quantities of code block groups; selecting the physical resources included in the physical resource group that corresponds to the initial transmission to send the transport block; determining the quantity of code block groups that were erroneously sent in the transport block according to the response; selecting one of the physical resources in one of the physical resource groups that corresponds to the retransmission to send at least one code block group that was erroneously sent according to the quantity of code block groups that were erroneously sent; and completing the retransmission only after all of the code block groups in the transport block have been successfully sent.

Abstract: A manufacturing method of a semiconductor structure including the following steps is provided. A first substrate is provided. A first dielectric structure is formed on the first substrate. At least one first cavity is formed in the first dielectric structure. A first stress adjustment layer is formed in the first cavity. The first stress adjustment layer covers the first dielectric structure. A second substrate is provided. A second dielectric structure is formed on the second substrate. At least one second cavity is formed in the second dielectric structure. A second stress adjustment layer is formed in the second cavity. The second stress adjustment layer covers the second dielectric structure. The first stress adjustment layer and the second stress adjustment layer are bonded.

Abstract: A base station management device is provided in the invention. The base station management device includes a Non-Real Time (Non-RT) Radio-Access-Network Intelligent Controller (RIC) and a management device. The Non-RT RIC communicates with applications through a first communication interface. The management device manages a plurality of base stations, communicates with the Non-RT RIC through a second communication interface, and registers a first application and a second application through the Non-RT RIC. The management device detects the plurality of base stations through the first application to determine whether to update the parameter information of the plurality of base stations through the second application.

Abstract: A method for communication in service management and orchestration is provided. The method includes receiving, by a Non-real time radio access network (RAN) Intelligent Controller (Non-RT RIC) framework, a first subscription message from an Element Management System (EMS), wherein the first subscription message is used to request second data used to run a Non-RT RIC application (rApp). The method includes transmitting, by the Non-RT RIC framework, a first callback message to the rApp according to the first subscription message to notify the rApp that the EMS requests the second data.

Abstract: A data retransmission method includes configuring the quantity of code block groups in a transport block and configuring a plurality of physical resource groups; configuring the quantity of physical resources included in each of the physical resource groups according to the different quantities of code block groups; selecting the physical resources included in the physical resource group that corresponds to the initial transmission to send the transport block; determining the quantity of code block groups that were erroneously sent in the transport block according to the response; selecting one of the physical resources in one of the physical resource groups that corresponds to the retransmission to send at least one code block group that was erroneously sent according to the quantity of code block groups that were erroneously sent; and completing the retransmission only after all of the code block groups in the transport block have been successfully sent.

Abstract: A method for detecting and preventing the operation of a rogue access point (AP) by issuing deauthentication packets thereto includes receiving beacon packets of all wireless APs in a wireless network area, obtaining timestamps, and establishing a clock skew model for each wireless AP accordingly. Each clock skew model can be held abnormal according to a growth slope of the clock skew model, and the wireless AP corresponding to an abnormal clock offset model can be defined as a rogue AP. Position and distance range of the rogue AP can be established by RSSIs, and a specified authorized AP adjacent to the rogue AP can be selected and controlled to send deauthentication packets to the rogue AP. A device for detecting and restraining the rogue AP is also provided.

Abstract: A method for detecting and preventing the operation of a rogue access point (AP) by issuing deauthentication packets thereto includes receiving beacon packets of all wireless APs in a wireless network area, obtaining timestamps, and establishing a clock skew model for each wireless AP accordingly. Each clock skew model can be held abnormal according to a growth slope of the clock skew model, and the wireless AP corresponding to an abnormal clock offset model can be defined as a rogue AP. Position and distance range of the rogue AP can be established by RSSIs, and a specified authorized AP adjacent to the rogue AP can be selected and controlled to send deauthentication packets to the rogue AP. A device for detecting and restraining the rogue AP is also provided.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first silicon layer, an insulating layer on the first silicon layer, and a second silicon layer on the insulating layer; forming a metal-oxide semiconductor (MOS) transistor on the substrate; forming an interlayer dielectric layer (ILD) on the MOS transistor; removing part of the ILD layer to form a first trench to expose the insulating layer; and performing a wet etching process through the first trench to remove part of the insulating layer for forming a first air gap under the MOS transistor.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first silicon layer, an insulating layer on the first silicon layer, and a second silicon layer on the insulating layer; forming a metal-oxide semiconductor (MOS) transistor on the substrate; forming an interlayer dielectric layer (ILD) on the MOS transistor; removing part of the ILD layer to form a first trench to expose the insulating layer; and performing a wet etching process through the first trench to remove part of the insulating layer for forming a first air gap under the MOS transistor.

Abstract: The present disclosure recites a distributed storage method applied in a distributed file system, and the method including steps: splitting the original file into data blocks and storing in a data block queue; assigning multiple data nodes to form a first pipe to transmit a first data block from the data block queue, and when the first one of the data nodes in the first pipe have been written in the data block, assigning another multiple data nodes to form a second pipe to transmit a second data block from the data block queue; transmitting the pipes when the overall data nodes of the first and second pipes been written in the first and second data blocks. The present disclosure also provides a distributed storage system, and all of them can improve the transmission speed of the distributed file system.