Patents by Inventor Chih-Wen Hsueh

Chih-Wen Hsueh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240114688
    Abstract: A memory structure including a substrate, a first doped region, a second doped region, a first gate, a second gate, a first charge storage structure, and a second charge storage structure is provided. The first gate is located on the first doped region. The second gate is located on the second doped region. The first charge storage structure is located between the first gate and the first doped region. The first charge storage structure includes a first tunneling dielectric layer, a first dielectric layer, and a first charge storage layer. The second charge storage structure is located between the second gate and the second doped region. The second charge storage structure includes a second tunneling dielectric layer, a second dielectric layer, and a second charge storage layer. The thickness of the second tunneling dielectric layer is greater than the thickness of the first tunneling dielectric layer.
    Type: Application
    Filed: November 21, 2022
    Publication date: April 4, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chia-Wen Wang, Chien-Hung Chen, Chia-Hui Huang, Ling Hsiu Chou, Jen Yang Hsueh, Chih-Yang Hsu
  • Patent number: 10965466
    Abstract: A method for calculating a number of proof-of-work to measure how much work has been done in one block mining, includes the following steps: using a low hash, wherein the low hash value corresponding to a low nonce is not greater than a predetermined target value; using a high hash, wherein the high hash value corresponding to a high nonce is higher than the same target value; and calculating the number of proof-of-work according to the low hash value and the high hash value. The low hash value is the lowest hash value in one block mining. The high hash value is the highest hash value in the same block mining.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: March 30, 2021
    Assignee: National Taiwan University
    Inventor: Chih-Wen Hsueh
  • Publication number: 20200044854
    Abstract: A method for calculating a number of proof-of-work to measure how much work has been done in one block mining, includes the following steps: using a low hash, wherein the low hash value corresponding to a low nonce is not greater than a predetermined target value; using a high hash, wherein the high hash value corresponding to a high nonce is higher than the same target value; and calculating the number of proof-of-work according to the low hash value and the high hash value. The low hash value is the lowest hash value in one block mining. The high hash value is the highest hash value in the same block mining.
    Type: Application
    Filed: August 3, 2018
    Publication date: February 6, 2020
    Inventor: Chih-Wen Hsueh
  • Publication number: 20150154119
    Abstract: A memory allocation and page address translation system includes a buddy memory allocator, a plurality of guest page tables, a memory management unit and a buddy translation lookaside buffer. The buddy memory allocator is configured for allocating machine physical memory space to a virtual machine monitor and a plurality of virtual machines. Each of the virtual machine monitor and the virtual machines receives memory chunks with different sizes. The guest page tables are configured for providing virtual address translation references for the virtual machine monitor and the virtual machines. The memory management unit is configured for translating a virtual address into a guest physical address. The buddy translation lookaside buffer is configured for translating the guest physical address into a machine physical address.
    Type: Application
    Filed: April 28, 2014
    Publication date: June 4, 2015
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Yuan-Cheng LEE, Chih-Wen HSUEH
  • Publication number: 20070300054
    Abstract: An universal BSP tool for porting on embedded systems and an application method thereof are proposed. The universal BSP tool comprises a BSP parser and a code generator, and is used to parse an open reusable document in XML format, BSPXML. Hardware specification of a target embedded platform and booting process of a specific OS or application are described in the BSPXML document. After parsing of the BSPXML document, bootstrap code of a specific embedded OS or application on the target platform can be generated. BSP low-level functions are also provided by the BSP tool for further use in OS and application after booting to control the embedded hardware. The BSP tool can simplify and automate the process of porting to achieve the objective of reducing the time to market for embedded systems.
    Type: Application
    Filed: June 21, 2006
    Publication date: December 27, 2007
    Inventors: Shi-Wu Lo, Chih-Wen Hsueh, Yung-Chieh Chou, Hsin-hung Lin