Patents by Inventor Chih-Wen LAI
Chih-Wen LAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11979613Abstract: Encoding methods and apparatuses include receiving input video data of a current block in a current picture and applying a Cross-Component Adaptive Loop Filter (CCALF) processing on the current block based on cross-component filter coefficients to refine chroma components of the current block according to luma sample values. The method further includes signaling two Adaptive Loop Filter (ALF) signal flags and two CCALF signal flags in an Adaptation Parameter Set (APS) with an APS parameter type equal to ALF or parsing two ALF signal flags and two CCALF signal flags from an APS with an APS parameter type equal to ALF, signaling or parsing one or more Picture Header (PH) CCALF syntax elements or Slice Header (SH) CCALF syntax elements, wherein both ALF and CCALF signaling are present either in a PH or SH, and encoding or decoding the current block in the current picture.Type: GrantFiled: June 28, 2022Date of Patent: May 7, 2024Assignee: HFI INNOVATION INC.Inventors: Ching-Yeh Chen, Olena Chubach, Chen-Yen Lai, Tzu-Der Chuang, Chih-Wei Hsu, Yu-Wen Huang
-
Publication number: 20240147376Abstract: Apparatus and methods are provided for thermal throttling for UE configured with multi-panel transceiving on FR2. In one novel aspect, the UE prioritizes throttling actions based on signal qualities of each transceiving panel. In one embodiment, the switching to the target panel from the active panel is selected as the highest priority throttling action when the signal quality of the target panel is similar to the active panel. In another embodiment, the UE further determines if the quality of the target panel is sufficient to support mmW transceiving before switching to the target panel. In one embodiment, the UE reduces one or more antennae of an active panel when the signal quality difference between the active panel and the target panel is bigger than a predefined gap threshold.Type: ApplicationFiled: September 22, 2023Publication date: May 2, 2024Inventors: Chih-Chieh Lai, Feng-Wen Weng, Yu-Hung Huang, Chi-Hsiang Lin
-
Publication number: 20240096756Abstract: A method of making a semiconductor device includes manufacturing a first transistor over a first side of a substrate. The method further includes depositing a spacer material against a sidewall of the first transistor. The method further includes recessing the spacer material to expose a first portion of the sidewall of the first transistor. The method further includes manufacturing a first electrical connection to the transistor, a first portion of the electrical connection contacts a surface of the first transistor farthest from the substrate, and a second portion of the electrical connect contacts the first portion of the sidewall of the first transistor. The method further includes manufacturing a self-aligned interconnect structure (SIS) extending along the spacer material, wherein the spacer material separates a portion of the SIS from the first transistor, and the first electrical connection directly contacts the SIS.Type: ApplicationFiled: November 22, 2023Publication date: March 21, 2024Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Syuan CIOU, Hui-Zhong ZHUANG, Ching-Wei TSAI, Shang-Wen CHANG
-
Publication number: 20240087896Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.Type: ApplicationFiled: November 21, 2023Publication date: March 14, 2024Inventors: Chih-Min HSIAO, Chien-Wen LAI, Ru-Gun LIU, Chih-Ming LAI, Shih-Ming CHANG, Yung-Sung YEN, Yu-Chen CHANG
-
Publication number: 20180268771Abstract: A display panel includes a substrate, a plurality of pixels, a plurality of scan lines, a pull-down control circuit, and a gate driving circuit. The pixels are disposed on a display area of the substrate. The scan lines are disposed on the substrate and respectively coupled to the corresponding pixels. The pull-down control circuit is disposed on a peripheral area of the substrate, receives a plurality of clock signals, and has a plurality of pull-down units to provide a plurality of pull-down signals. The gate driving circuit is disposed on the peripheral area and has a plurality of shift registers. The shift registers are coupled to the scan lines to provide a plurality of gate driving signals and pull down the gate driving signals in sequence according to the pull-down signals. The pull-down control circuit and the gate driving circuit are arranged along a side of the display area.Type: ApplicationFiled: May 24, 2018Publication date: September 20, 2018Applicant: Chunghwa Picture Tubes, LTD.Inventors: Wei-Lung Li, Chih-Wen Lai
-
Patent number: 10019958Abstract: A display panel includes a substrate, a plurality of pixels, a plurality of scan lines, a pull-down control circuit, and a gate driving circuit. The pixels are disposed on a display area of the substrate. The scan lines are disposed on the substrate and respectively coupled to the corresponding pixels. The pull-down control circuit is disposed on a peripheral area of the substrate, receives a plurality of clock signals, and has a plurality of pull-down units to provide a plurality of pull-down signals. The gate driving circuit is disposed on the peripheral area and has a plurality of shift registers. The shift registers are coupled to the scan lines to provide a plurality of gate driving signals and pull down the gate driving signals in sequence according to the pull-down signals. The pull-down control circuit and the gate driving circuit are arranged along a side of the display area.Type: GrantFiled: July 26, 2016Date of Patent: July 10, 2018Assignee: Chunghwa Picture Tubes, LTD.Inventors: Wei-Lung Li, Chih-Wen Lai
-
Publication number: 20160335974Abstract: A display panel includes a substrate, a plurality of pixels, a plurality of scan lines, a pull-down control circuit, and a gate driving circuit. The pixels are disposed on a display area of the substrate. The scan lines are disposed on the substrate and respectively coupled to the corresponding pixels. The pull-down control circuit is disposed on a peripheral area of the substrate, receives a plurality of clock signals, and has a plurality of pull-down units to provide a plurality of pull-down signals. The gate driving circuit is disposed on the peripheral area and has a plurality of shift registers. The shift registers are coupled to the scan lines to provide a plurality of gate driving signals and pull down the gate driving signals in sequence according to the pull-down signals. The pull-down control circuit and the gate driving circuit are arranged along a side of the display area.Type: ApplicationFiled: July 26, 2016Publication date: November 17, 2016Applicant: Chunghwa Picture Tubes, LTD.Inventors: Wei-Lung Li, Chih-Wen Lai
-
Patent number: 9430981Abstract: A display panel includes a substrate, a plurality of pixels, a plurality of scan lines, a pull-down control circuit, and a gate driving circuit. The pixels are disposed on a display area of the substrate. The scan lines are disposed on the substrate and respectively coupled to the corresponding pixels. The pull-down control circuit is disposed on a peripheral area of the substrate, receives a plurality of clock signals, and has a plurality of pull-down units to provide a plurality of pull-down signals. The gate driving circuit is disposed on the peripheral area and has a plurality of shift registers. The shift registers are coupled to the scan lines to provide a plurality of gate driving signals and pull down the gate driving signals in sequence according to the pull-down signals. The pull-down control circuit and the gate driving circuit are arranged along a side of the display area.Type: GrantFiled: July 11, 2013Date of Patent: August 30, 2016Assignee: Chunghwa Picture Tubes, LTD.Inventors: Wei-Lung Li, Chih-Wen Lai
-
Patent number: 9406575Abstract: A pixel array substrate including a substrate and pixel units arranged in an array on the substrate is provided. Each pixel unit includes a TFT having a source, a gate, and a drain, a pixel electrode electrically connected to the drain, a common electrode, an insulation layer, and a test electrode. The pixel electrode is located between the common electrode and the substrate. The common electrode has slits that expose the pixel electrode. The insulation layer is located between the common electrode and the pixel electrode and has a contact hole exposing the pixel electrode. The test electrode and the common electrode belong to the same film layer, and the test electrode is separated from the common electrode. The contact hole is filled with the test electrode, and the test electrode is electrically connected to the drain. A display panel including the pixel array substrate is also provided.Type: GrantFiled: January 27, 2014Date of Patent: August 2, 2016Assignee: Chunghwa Picture Tubes, LTD.Inventors: Tzu-Chiang Liao, Chih-Wen Lai
-
Publication number: 20160190342Abstract: An active element and a fabricating method thereof are provided. The active element includes a gate, a gate insulating layer, a channel, a source and a drain. The gate is disposed on a substrate. The gate insulating layer is disposed on the substrate and covers the gate. The gate insulating layer is divided into a first region having uniform thickness and a second region having uniform thickness. The thickness of the gate insulating layer in the first region is different from the thickness of the gate insulating layer in the second region. The channel is disposed on the gate insulating layer. The source and the drain are disposed on the gate insulating layer and separated from each other. The distribution region of the source and the drain is identical to the distribution region of the first region. The channel contacts with the source and the drain.Type: ApplicationFiled: March 18, 2015Publication date: June 30, 2016Inventors: Hao-Wei Wang, Chia-Ming Chiang, Chih-Wen Lai
-
Patent number: 9299304Abstract: A gate driving circuit includes a first input terminal, a second input terminal, a third input terminal, an output terminal, a first transistor, a second transistor, a third transistor, and a capacitor. The first terminal of the first transistor is coupled to the first input terminal. The control terminal of the first transistor is coupled to the second input terminal. The first terminal of the second transistor is coupled to the third input terminal. The control terminal of the second transistor is coupled to the second terminal of the first transistor. The second terminal of the second transistor is coupled to the output terminal. The first terminal of the third transistor is coupled to the output terminal. The second terminal of the third transistor is coupled to ground terminal. The capacitor is coupled between the control terminal of the second transistor and the output terminal.Type: GrantFiled: September 13, 2013Date of Patent: March 29, 2016Assignee: CHUNGHWA PICTURE TUBES, LTD.Inventors: Wei-Lung Li, Chih-Wen Lai
-
Patent number: 9280953Abstract: A display panel includes a plurality of rows of pixels, a gate driving circuit, and an inspection circuit. The gate driving circuit includes a plurality of gate driving units. The inspection circuit includes a plurality of transistors. Each transistor includes a first terminal, a control terminal, and a second terminal. The first terminal of the transistor is coupled to a contact pad. The control terminal of the transistor is coupled to the corresponding gate driving unit and a corresponding row of pixels. The second terminal of the transistor is coupled to the control terminal of the transistor.Type: GrantFiled: June 13, 2014Date of Patent: March 8, 2016Assignee: Chunghwa Picture Tubes, Ltd.Inventors: Tzu-Chiang Liao, Chih-Wen Lai
-
Publication number: 20150269910Abstract: A display panel includes a plurality of rows of pixels, a gate driving circuit, and an inspection circuit. The gate driving circuit includes a plurality of gate driving units. The inspection circuit includes a plurality of transistors. Each transistor includes a first terminal, a control terminal, and a second terminal. The first terminal of the transistor is coupled to a contact pad. The control terminal of the transistor is coupled to the corresponding gate driving unit and a corresponding row of pixels. The second terminal of the transistor is coupled to the control terminal of the transistor.Type: ApplicationFiled: June 13, 2014Publication date: September 24, 2015Inventors: Tzu-Chiang Liao, Chih-Wen Lai
-
Publication number: 20150170981Abstract: A pixel array substrate including a substrate and pixel units arranged in an array on the substrate is provided. Each pixel unit includes a TFT having a source, a gate, and a drain, a pixel electrode electrically connected to the drain, a common electrode, an insulation layer, and a test electrode. The pixel electrode is located between the common electrode and the substrate. The common electrode has slits that expose the pixel electrode. The insulation layer is located between the common electrode and the pixel electrode and has a contact hole exposing the pixel electrode. The test electrode and the common electrode belong to the same film layer, and the test electrode is separated from the common electrode. The contact hole is filled with the test electrode, and the test electrode is electrically connected to the drain. A display panel including the pixel array substrate is also provided.Type: ApplicationFiled: January 27, 2014Publication date: June 18, 2015Applicant: Chunghwa Picture Tubes, LTD.Inventors: Tzu-Chiang Liao, Chih-Wen Lai
-
Publication number: 20140320175Abstract: A gate driving circuit includes a first input terminal, a second input terminal, a third input terminal, an output terminal, a first transistor, a second transistor, a third transistor, and a capacitor. The first terminal of the first transistor is coupled to the first input terminal. The control terminal of the first transistor is coupled to the second input terminal. The first terminal of the second transistor is coupled to the third input terminal. The control terminal of the second transistor is coupled to the second terminal of the first transistor. The second terminal of the second transistor is coupled to the output terminal. The first terminal of the third transistor is coupled to the output terminal. The second terminal of the third transistor is coupled to ground terminal. The capacitor is coupled between the control terminal of the second transistor and the output terminal.Type: ApplicationFiled: September 13, 2013Publication date: October 30, 2014Applicant: CHUNGHWA PICTURE TUBES, LTD.Inventors: Wei-Lung LI, Chih-Wen LAI
-
Publication number: 20140320386Abstract: A display panel includes a substrate, a plurality of pixels, a plurality of scan lines, a pull-down control circuit, and a gate driving circuit. The pixels are disposed on a display area of the substrate. The scan lines are disposed on the substrate and respectively coupled to the corresponding pixels. The pull-down control circuit is disposed on a peripheral area of the substrate, receives a plurality of clock signals, and has a plurality of pull-down units to provide a plurality of pull-down signals. The gate driving circuit is disposed on the peripheral area and has a plurality of shift registers. The shift registers are coupled to the scan lines to provide a plurality of gate driving signals and pull down the gate driving signals in sequence according to the pull-down signals. The pull-down control circuit and the gate driving circuit are arranged along a side of the display area.Type: ApplicationFiled: July 11, 2013Publication date: October 30, 2014Inventors: Wei-Lung Li, Chih-Wen Lai