Abstract: A method of fabricating a semiconductor structure includes forming a recess in an active channel structure by removing a portion thereof, filling the recess with a dielectric material, forming a cladding layer adjacent the active channel structure but not adjacent the dielectric material, and forming a gate structure comprising a first gate structure and a second gate structure around the active channel structure. A width of the dielectric material in the recess is greater than a width of the first gate structure and a width of the second gate structure.

Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another, a gate structure that comprises a lower portion and an upper portion, a gate spacer that extends along a sidewall of the upper portion of the gate structure and has a bottom surface, and an etch stop layer extends between the portion of the bottom surface of the gate spacer and the top surface of the topmost semiconductor layer.

Abstract: Embodiments of the present disclosure provide semiconductor device structures and methods of forming the same. The structure includes a source/drain region disposed over a substrate, a gate electrode layer disposed over the substrate, a first gate spacer disposed between the gate electrode layer and the source/drain region, and a dielectric spacer disposed between the gate electrode layer and the source/drain region. A first portion of the dielectric spacer is in contact with a first portion of the first gate spacer. The structure further includes a sacrificial layer disposed between a second portion of the first gate spacer and a second portion of the dielectric spacer.

Abstract: A package structure includes a first bonding film on a first package component and a first alignment mark in the first bonding film. The first alignment mark includes a plurality of first patterns spaced apart from each other. The package structure includes a second bonding film on a second package component and bonded to the first bonding film, and a second alignment mark in the second bonding film. The second alignment mark includes a plurality of second patterns spaced apart from each other, and the first patterns overlap the second patterns. In this case, an interference pattern can be formed by the optical signal passing through the varying spacing between the gratings of top wafer and bottom wafer due to pitch difference between first pitch and second pitch. By reading the optical signal, the resolution of overlay (misalignment) measurement is improved.

Abstract: Semiconductor devices and methods for forming the semiconductor devices using a cap layer are provided. The semiconductor devices include a plurality of semiconductor layers vertically separated from one another, a gate structure that comprises a lower portion and an upper portion, wherein the lower portion wraps around each of the plurality of semiconductor layers, and a gate spacer that extends along a sidewall of the upper portion of the gate structure. In some examples, a gap dimension measured between the gate spacer and an adjacent one of the plurality of semiconductor layers is sufficiently small such that the gate structure does not contact the source/drain structures. In some examples, the gate spacer and an adjacent one of the one or more semiconductor layers of the fin structure are separated by a cap layer.

Abstract: A head-mounted device and a headband are disclosed. The head-mounted device includes a host and a headband. The host has two connecting parts located on opposite sides. The headband has two connecting ends located on opposite sides. The connecting ends are detachably and rotatably connected to the connecting part. A first buckle part of each of the connecting ends rotatably buckles a second buckle part of a corresponding one of the connecting parts. When the headband rotates to a detachable position relative to the host, the first buckle part and the second buckle part are separated.

Abstract: A display may include an array of pixels such as light-emitting diode pixels. The pixels may include multiple circuitry decks that each include one or more circuit components such as transistors, capacitors, and/or resistors. The circuitry decks may be vertically stacked. Each circuitry deck may include a planarization layer formed from a siloxane material that conforms to underlying components and provides a planar upper surface. In this way, circuitry components may be vertically stacked to mitigate the size of each pixel footprint. The circuitry components may include capacitors that include both a high-k dielectric layer and a low-k dielectric layer. The display pixel may include a via with a width of less than 1 micron.

Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate over the fin; reducing a thickness of a lower portion of the dummy gate proximate to the isolation regions, where after reducing the thickness, a distance between opposing sidewalls of the lower portion of the dummy gate decreases as the dummy gate extends toward the isolation regions; after reducing the thickness, forming a gate fill material along at least the opposing sidewalls of the lower portion of the dummy gate; forming gate spacers along sidewalls of the dummy gate and along sidewalls of the gate fill material; and replacing the dummy gate with a metal gate.

Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.

Abstract: A semiconductor fabrication method includes: forming an epitaxial stack including at least one sacrificial epitaxial layer and at least one channel epitaxial layer; forming a plurality of fins in the epitaxial stack; performing tuning operations to prevent a width of the sacrificial epitaxial layer expanding beyond a width of the channel epitaxial layer during operations to form isolation features; forming the isolation features between the plurality of fins, wherein the width of the sacrificial epitaxial layer does not expand beyond the width of the channel epitaxial layer; forming a sacrificial gate stack; forming gate sidewall spacers on sidewalls of the sacrificial gate stack; forming inner spacers around the sacrificial epitaxial layer and the channel epitaxial layer; forming source/drain features; removing the sacrificial gate stack and sacrificial epitaxial layer; and forming a replacement metal gate, wherein the metal gate is shielded from the source/drain features.

Abstract: A method of forming a nanosheet FET is provided. A plurality of first and second semiconductor layers are alternately formed on a substrate. The first and second semiconductor layers are patterned into a plurality of stacks of semiconductor layers separate from each other by a space along a direction. Each stack of semiconductor layers has a cross-sectional view along the direction gradually widening towards the substrate. An epitaxial feature is formed in each of the spaces. The patterned second semiconductor layers are then removed from each of the stacks of semiconductor layers.

Abstract: A wearable device includes a host and a head strap module. The host has a pair of host connecting ends. The head strap module includes a head strap body and a pair of strengthening assemblies. The head strap body has a pair of head strap connecting ends. The pair of head strap connecting ends are respectively detachably assembled to the pair of host connecting ends. Each of the pair of strengthening assemblies has an outer cover and an inner cover. The outer cover and the corresponding inner cover are connected to each other to jointly cover and hold the corresponding host connecting end and the corresponding head strap connecting end. In addition, a head strap module applied to a wearable device is also provided.

Abstract: A wearable device includes a host, a side head strap module, and an upper head strap module. The host has a sliding rail. The side head strap module is connected to the host. The upper head strap module includes a sliding base, a front buckle, and an upper head strap. The sliding base is detachably coupled to the sliding rail and slides along the sliding rail. The sliding rail has a first engaging part. The sliding base has a second engaging part. An engagement between the first engaging part and the second engaging part temporarily fixes the sliding base to the sliding rail. The front buckle is pivotally connected to the sliding base. The upper head strap is connected between the side head strap module and the front buckle. In addition, an upper head strap module applied to the wearable device is also proposed.

Abstract: A calibration method for a radio frequency (RF) transceiver and a calibration system thereof are provided. The calibration method includes configuring a controller to perform a first transmission test on the RF transceiver and generate a plurality of model test results for selecting a target calibration model from a plurality of reference calibration models to calibrate the RF transceiver; configuring the controller to perform a second transmission test on the RF transceiver and generate a plurality of parameter test results for selecting a target parameter set from a plurality of reference parameters to calibrate the RF transceiver; and configuring the controller to perform a third transmission test on the RF transceiver and generate a plurality of circuit test results for selecting a target simulation circuit from a plurality of reference simulation circuits to match the target simulation circuit to the RF transceiver.

Abstract: This application provides a recommendation model training method in the artificial intelligence (AI) field. The training method includes: obtaining a first training sample; processing attribute information of a first user and information about a first recommended object based on an interpolation model, to obtain an interpolation prediction label of the first training sample; and performing training by using the attribute information of the first user and the information about the first recommended object as an input to a recommendation model and using the interpolation prediction label of the first training sample as a target output value of the recommendation model, to obtain a trained recommendation model. According to the technical solutions of this application, impact of training data bias on recommendation model training can be alleviated, and recommendation model accuracy can be improved.

Abstract: A wearable device and a head strap module are provided. The wearable device includes a host and a head strap module. Two opposite sides of the host are provided with a first bracket and a second bracket. The first bracket has a first end. The second bracket has a second end. The head strap module includes a first belt, a second belt, and an adjustment mechanism. The first belt has a third end. The second belt has a fourth end. The third end and the fourth end are detachably assembled to the first end and the second end respectively. The adjustment mechanism is arranged at the overlapping position of the first belt and the second belt for adjusting the overlapping length of the first belt and the second belt.

Abstract: A wearable device includes a host, a first belt, a second belt, a circuit board, a cable, and an adjustment mechanism. The first belt, one end of which is connected to a first side of the host, has a cable holding part. One end of the second belt is connected to a second side of the host. The circuit board is disposed at an overlap of the first belt and the second belt. A first end and a second end opposite to each other of the cable are connected to the circuit board and the first side respectively, and a holding section of the cable is fixed to the cable holding part. The adjusting mechanism is disposed at an overlap of the first belt and the second belt to adjust an overlapping length of the first belt and the second belt.

Abstract: An electronic device may have a display, a display cover layer, and an image transport layer formed from a coherent fiber bundle. The coherent fiber bundle may have an input surface that receives an image from the display and a corresponding output surface to which the image is provide through the coherent fiber bundle. The coherent fiber bundle may be placed between the display and the display cover layer and mounted to a housing. The coherent fiber bundle may have fiber cores with bends that help conceal the housing from view and make the display appear borderless. A central portion of the coherent fiber bundle may be formed from different materials and/or structures than a surrounding border portion of the layer.

Abstract: A wearable device includes a host, a first belt, a second belt, a circuit board, a cable, and an adjustment mechanism. The first belt, one end of which is connected to a first side of the host, has a cable holding part. One end of the second belt is connected to a second side of the host. The circuit board is disposed at an overlap of the first belt and the second belt. A first end and a second end opposite to each other of the cable are connected to the circuit board and the first side respectively, and a holding section of the cable is fixed to the cable holding part. The adjusting mechanism is disposed at an overlap of the first belt and the second belt to adjust an overlapping length of the first belt and the second belt.

Abstract: A wearable device and a head strap module are provided. The wearable device includes a host and a head strap module. Two opposite sides of the host are provided with a first bracket and a second bracket. The first bracket has a first end. The second bracket has a second end. The head strap module includes a first belt, a second belt, and an adjustment mechanism. The first belt has a third end. The second belt has a fourth end. The third end and the fourth end are detachably assembled to the first end and the second end respectively. The adjustment mechanism is arranged at the overlapping position of the first belt and the second belt for adjusting the overlapping length of the first belt and the second belt.