Patents by Inventor Chih-Yao Chang

Chih-Yao Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250009081
    Abstract: A wearable device includes a host and a head strap module. The host has a pair of host connecting ends. The head strap module includes a head strap body and a pair of strengthening assemblies. The head strap body has a pair of head strap connecting ends. The pair of head strap connecting ends are respectively detachably assembled to the pair of host connecting ends. Each of the pair of strengthening assemblies has an outer cover and an inner cover. The outer cover and the corresponding inner cover are connected to each other to jointly cover and hold the corresponding host connecting end and the corresponding head strap connecting end. In addition, a head strap module applied to a wearable device is also provided.
    Type: Application
    Filed: March 27, 2024
    Publication date: January 9, 2025
    Applicant: HTC Corporation
    Inventors: Chien Min Lin, Chih-Yao Chang, Tsen-Wei Kung, Chung-Ju Wu, Tsung-Hua Yang
  • Publication number: 20250005257
    Abstract: A method for performing automatic layout defect checking (ALDC) control regarding circuit design, associated apparatus and an associated computer-readable medium are provided. The method applicable to a processing circuit may include: providing a web-based entry in an ALDC control system running on a processing circuit, for any user among multiple users to upload at least a layout file of a package substrate design of at least one package substrate to the ALDC control system, in order to obtain at least the layout file from a client electronic device through the web-based entry; utilizing at least one backend program module to check the layout file according to a plurality of predetermined layout defect checking rules to generate at least one checking result, and create a layout defect checking report of the package substrate design; and sending the layout defect checking report corresponding to the layout file to the client electronic device.
    Type: Application
    Filed: June 10, 2024
    Publication date: January 2, 2025
    Applicant: MEDIATEK INC.
    Inventors: Shu-Huan Chang, Yi-Hung Chen, Chih-Jung Hsu, Chen Lien, Guan-Qi Fang, Deng-Yao Tu, Po-Yang Chen
  • Publication number: 20240415246
    Abstract: A wearable device includes a host, a side head strap module, and an upper head strap module. The host has a sliding rail. The side head strap module is connected to the host. The upper head strap module includes a sliding base, a front buckle, and an upper head strap. The sliding base is detachably coupled to the sliding rail and slides along the sliding rail. The sliding rail has a first engaging part. The sliding base has a second engaging part. An engagement between the first engaging part and the second engaging part temporarily fixes the sliding base to the sliding rail. The front buckle is pivotally connected to the sliding base. The upper head strap is connected between the side head strap module and the front buckle. In addition, an upper head strap module applied to the wearable device is also proposed.
    Type: Application
    Filed: April 15, 2024
    Publication date: December 19, 2024
    Applicant: HTC Corporation
    Inventors: Chih-Yao Chang, Tsen-Wei Kung, Chung-Ju Wu, Tsung-Hua Yang, Chien Min Lin
  • Patent number: 12158308
    Abstract: A heat dissipation device is provided and includes: a first vapor chamber filled with a first working fluid therein and used for contacting at least one heat source; at least one heat transfer structure disposed on a side of the first vapor chamber; and a second vapor chamber filled with a second working fluid therein and connected to the first vapor chamber via the heat transfer structure, where the first working fluid absorbs heat of the heat source and then vaporizes, and the vaporized first working fluid transfers the heat to the second working fluid via the heat transfer structure.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: December 3, 2024
    Assignee: AURAS TECHNOLOGY CO., LTD.
    Inventors: Chih-Wei Chen, Tien-Yao Chang, Che-Wei Kuo, Hsiang-Chih Chuang, Jyun-Wei Huang, Kang-Ming Fan
  • Publication number: 20240387275
    Abstract: A method of fabricating a semiconductor device is described. The method includes forming a plurality of fins over a substrate, and forming dummy gates patterned over the fins. Each dummy gate has a spacer on sidewalls of the patterned dummy gates. The method also includes forming recesses in the fins by using the patterned dummy gates as a mask, forming a passivation layer over the fins and in the recesses in the fins, and patterning the passivation layer to leave a remaining passivation layer in some of the recesses in the fins.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Chen-Ping Chen, Ming-Ching Chang, Chia-Hao Yu, Hsiao Wen Lee
  • Patent number: 12148671
    Abstract: A method of fabricating a semiconductor device is described. A plurality of fins is formed over a substrate. Dummy gates are formed patterned over the fins, each dummy gate having a spacer on sidewalls of the patterned dummy gates. Recesses are formed in the fins using the patterned dummy gates as a mask. A passivation layer is formed over the fins and in the recesses in the fins. The passivation layer is patterned to leave a remaining passivation layer only in some of the recesses in the fins. Source and drain regions are epitaxially formed only in the recesses in the fins without the remaining passivation layer.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: November 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Chen-Ping Chen, Ming-Ching Chang, Chia-Hao Yu, Hsiao Wen Lee
  • Patent number: 12141006
    Abstract: A power management method for an electronic device is provided. The electronic device includes a processing unit with a core and configured to execute an application program and a functional element. The power management method includes the following steps: determining a maximum frame count per second of a scene; down-tuning a frequency setting value of the core; detecting an actual frame count per second of the scene; determining a change in power consumption of the processing unit and a temperature of the functional element when the actual frame count per second is equal to the maximum frame count per second; and down-tuning the frequency setting value when the power consumption does not increase and the temperature is lower than a preset temperature value, and restoring the frequency setting value when the power consumption increases or the temperature is higher than or equal to the preset temperature value.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: November 12, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chih-Yao Kuo, Ya-Han Chang, Huang-Chieh Huang
  • Publication number: 20240371644
    Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate over the fin; reducing a thickness of a lower portion of the dummy gate proximate to the isolation regions, where after reducing the thickness, a distance between opposing sidewalls of the lower portion of the dummy gate decreases as the dummy gate extends toward the isolation regions; after reducing the thickness, forming a gate fill material along at least the opposing sidewalls of the lower portion of the dummy gate; forming gate spacers along sidewalls of the dummy gate and along sidewalls of the gate fill material; and replacing the dummy gate with a metal gate.
    Type: Application
    Filed: July 19, 2024
    Publication date: November 7, 2024
    Inventors: Shih-Yao Lin, Kuei-Yu Kao, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
  • Publication number: 20240363735
    Abstract: A method includes forming a first fin and a second fin over a substrate. The method includes forming a first dummy gate structure that straddles the first fin and the second fin. The first dummy gate structure includes a first dummy gate dielectric and a first dummy gate disposed over the first dummy gate dielectric. The method includes replacing a portion of the first dummy gate with a gate isolation structure. The portion of the first dummy gate is disposed over the second fin. The method includes removing the first dummy gate. The method includes removing a first portion of the first dummy gate dielectric around the first fin, while leaving a second portion of the first dummy gate dielectric around the second fin intact. The method includes forming a gate feature straddling the first fin and the second fin, wherein the gate isolation structure intersects the gate feature.
    Type: Application
    Filed: July 3, 2024
    Publication date: October 31, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Shu-Uei Jang, Ya-Yi Tsai, Chi-Hsiang Chang, Tzu-Chung Wang, Shu-Yuan Ku
  • Patent number: 12129273
    Abstract: Compounds for use in prevention and/or treatment of pain are disclosed. The compounds are derived by conjugation of N6-(4-hydroxybenzyl)adenosine and analogous compounds with amino acids or peptides. In one embodiment of the invention, the compound is 5?-glycylcarbonyl-N6-(4-hydroxybenzyl)adenosine (I-a1). In another embodiment of the invention, the compound is 5?-deoxy-5?-(N?-glycylureido)-N6-(4-hydroxybenzyl)adenosine (I-d1). Also disclosed are methods of making and using the same.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: October 29, 2024
    Assignee: ACADEMIA SINICA
    Inventors: Chih-Cheng Chen, Jim-Min Fang, Cheng-Han Lee, Jen-Yao Chang
  • Publication number: 20240321891
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a dielectric fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate isolation structure vertically disposed above the dielectric fin. The semiconductor device includes a gate structure extending along a second direction perpendicular to the first direction. The gate structure includes a first portion and a second portion separated by the gate isolation structure and the dielectric fin. The first portion of the gate structure presents a first beak profile and the second portion of the gate structure presents a second beak profile. The first and second beak profiles point toward each other.
    Type: Application
    Filed: May 30, 2024
    Publication date: September 26, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chih-Han Lin, Ming-Ching Chang, Shu-Yuan Ku, Tzu-Chung Wang
  • Publication number: 20240319777
    Abstract: A heat dissipation control method applicable to a portable electronic device is provided. The portable electronic device is adapted to mount a heat dissipation back clip, and the heat dissipation back clip includes a cooling chip and a heat dissipation fan. The cooling chip has an adjustable cooling power consumption, and the heat dissipation fan has a heat removal wattage. The heat dissipation control method includes: detecting a real-time system power consumption of the portable electronic device; obtaining the cooling power consumption and the heat removal wattage; determining whether a sum of the real-time system power consumption and the cooling power consumption is greater than the heat removal wattage; and lowering the cooling power consumption if the sum is greater than the heat removal wattage. An electronic device and a portable electronic device to which the heat dissipation control method is applicable are further provided.
    Type: Application
    Filed: July 26, 2023
    Publication date: September 26, 2024
    Inventors: Chih-Yao KUO, Ya-Han CHANG, Huang-Chieh HUANG
  • Publication number: 20240305388
    Abstract: A calibration method for a radio frequency (RF) transceiver and a calibration system thereof are provided. The calibration method includes configuring a controller to perform a first transmission test on the RF transceiver and generate a plurality of model test results for selecting a target calibration model from a plurality of reference calibration models to calibrate the RF transceiver; configuring the controller to perform a second transmission test on the RF transceiver and generate a plurality of parameter test results for selecting a target parameter set from a plurality of reference parameters to calibrate the RF transceiver; and configuring the controller to perform a third transmission test on the RF transceiver and generate a plurality of circuit test results for selecting a target simulation circuit from a plurality of reference simulation circuits to match the target simulation circuit to the RF transceiver.
    Type: Application
    Filed: March 6, 2024
    Publication date: September 12, 2024
    Inventors: Chen-Shu PENG, Chih Yao CHANG
  • Publication number: 20240266209
    Abstract: A semiconductor device includes a fin extending from a substrate and including a first fin end, a separation structure separating the first fin end from an adjacent fin end of another fin, a dummy gate spacer along sidewalls of the separation structure and the fin, a first epitaxial source/drain region in the fin and adjacent the separation structure, and a residue of a dummy gate material in a corner region between the dummy gate spacer and the first fin end. The first fin end protrudes from the dummy gate spacer into the separation structure. The residue of the dummy gate material separates the first epitaxial source/drain region from the separation structure and is triangle shaped.
    Type: Application
    Filed: February 3, 2023
    Publication date: August 8, 2024
    Inventors: Chih-Han LIN, Kuei-Yu KAO, Shih-Yao LIN, Ke-Chia TSENG, Min Chiao LIN, Hsien-Chung HUANG, Chun-Hung CHEN, Guan Kai HUANG, Chao-Cheng CHEN, Chen-Ping CHEN, Ming-Ching CHANG
  • Patent number: 12046663
    Abstract: A method includes forming a first fin and a second fin over a substrate. The method includes forming a first dummy gate structure that straddles the first fin and the second fin. The first dummy gate structure includes a first dummy gate dielectric and a first dummy gate disposed over the first dummy gate dielectric. The method includes replacing a portion of the first dummy gate with a gate isolation structure. The portion of the first dummy gate is disposed over the second fin. The method includes removing the first dummy gate. The method includes removing a first portion of the first dummy gate dielectric around the first fin, while leaving a second portion of the first dummy gate dielectric around the second fin intact. The method includes forming a gate feature straddling the first fin and the second fin, wherein the gate isolation structure intersects the gate feature.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Shih-Yao Lin, Chih-Han Lin, Shu-Uei Jang, Ya-Yi Tsai, Chi-Hsiang Chang, Tzu-Chung Wang, Shu-Yuan Ku
  • Publication number: 20240242016
    Abstract: A layout routing method includes determining a routing pattern according to a swapping rule, a via pattern, area constraints and pin locations; optimizing swapping in differential pairs according to the routing pattern; extracting features of each routing net to obtain extracted features; using an unsupervised algorithm to generate different routing groups according to the extracted features; and determining a routing order of the routing groups according to complex features of the routing groups.
    Type: Application
    Filed: December 25, 2023
    Publication date: July 18, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chih-Jung Hsu, Chen Lien, Deng-Yao Tu, Po-Yang Chen, Guan-Qi Fang, Shu-Huan Chang, Yi-Hung Chen, Yao-Chun Su, Yu-Yang Chen
  • Patent number: 12038986
    Abstract: This application provides a recommendation model training method in the artificial intelligence (AI) field. The training method includes: obtaining a first training sample; processing attribute information of a first user and information about a first recommended object based on an interpolation model, to obtain an interpolation prediction label of the first training sample; and performing training by using the attribute information of the first user and the information about the first recommended object as an input to a recommendation model and using the interpolation prediction label of the first training sample as a target output value of the recommendation model, to obtain a trained recommendation model. According to the technical solutions of this application, impact of training data bias on recommendation model training can be alleviated, and recommendation model accuracy can be improved.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: July 16, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chih Yao Chang, Hong Zhu, Zhenhua Dong, Xiuqiang He, Bowen Yuan
  • Patent number: 12025295
    Abstract: A wearable device and a head strap module are provided. The wearable device includes a host and a head strap module. Two opposite sides of the host are provided with a first bracket and a second bracket. The first bracket has a first end. The second bracket has a second end. The head strap module includes a first belt, a second belt, and an adjustment mechanism. The first belt has a third end. The second belt has a fourth end. The third end and the fourth end are detachably assembled to the first end and the second end respectively. The adjustment mechanism is arranged at the overlapping position of the first belt and the second belt for adjusting the overlapping length of the first belt and the second belt.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: July 2, 2024
    Assignee: HTC Corporation
    Inventors: Tsen-Wei Kung, Chung-Ju Wu, Tsung Hua Yang, Chih-Yao Chang, Wei Te Tu
  • Patent number: 11927303
    Abstract: A wearable device includes a host, a first belt, a second belt, a circuit board, a cable, and an adjustment mechanism. The first belt, one end of which is connected to a first side of the host, has a cable holding part. One end of the second belt is connected to a second side of the host. The circuit board is disposed at an overlap of the first belt and the second belt. A first end and a second end opposite to each other of the cable are connected to the circuit board and the first side respectively, and a holding section of the cable is fixed to the cable holding part. The adjusting mechanism is disposed at an overlap of the first belt and the second belt to adjust an overlapping length of the first belt and the second belt.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: March 12, 2024
    Assignee: HTC Corporation
    Inventors: Tsen-Wei Kung, Chung-Ju Wu, Tsung Hua Yang, Chih-Yao Chang, Wei Te Tu
  • Patent number: 11754779
    Abstract: An electronic device may have a display, a display cover layer, and an image transport layer formed from a coherent fiber bundle. The coherent fiber bundle may have an input surface that receives an image from the display and a corresponding output surface to which the image is provide through the coherent fiber bundle. The coherent fiber bundle may be placed between the display and the display cover layer and mounted to a housing. The coherent fiber bundle may have fiber cores with bends that help conceal the housing from view and make the display appear borderless. A central portion of the coherent fiber bundle may be formed from different materials and/or structures than a surrounding border portion of the layer.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: September 12, 2023
    Assignee: Apple Inc.
    Inventors: Ying-Da Wang, Chih-Yao Chang, Chun-Chih Chang, Nathan K. Gupta, Wei Lin, Xiani Li