Patents by Inventor Chih-Yao Lin

Chih-Yao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154025
    Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate electrode over the fin; removing lower portions of the dummy gate electrode proximate to the isolation regions, where after removing the lower portions, there is a gap between the isolation regions and a lower surface of the dummy gate electrode facing the isolation regions; filling the gap with a gate fill material; after filling the gap, forming gate spacers along sidewalls of the dummy gate electrode and along sidewalls of the gate fill material; and replacing the dummy gate electrode and the gate fill material with a metal
    Type: Application
    Filed: January 10, 2024
    Publication date: May 9, 2024
    Inventors: Shih-Yao Lin, Kuei-Yu Kao, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
  • Publication number: 20240153827
    Abstract: A device includes a semiconductor substrate and a first gate stack over the semiconductor substrate, the first gate stack being between a first gate spacer and a second gate spacer. The device further includes a second gate stack over the semiconductor substrate between the first gate spacer and the second gate spacer and a dielectric material separating the first gate stack from the second gate stack. The dielectric material is at least partially between the first gate spacer and the second gate spacer, a first width of an upper portion of the dielectric material is greater than a second width of a lower portion of the dielectric material, and a third width of an upper portion of the first gate spacer is less than a fourth width of a lower portion of the first gate spacer.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 9, 2024
    Inventors: Shih-Yao Lin, Chih-Han Lin, Shu-Uei Jang, Ya-Yi Tsai, Shu-Yuan Ku
  • Patent number: 11965217
    Abstract: A method and a kit for detecting Mycobacterium tuberculosis are provided. The method includes a step of performing a nested qPCR assay to a specimen. The nested qPCR assay includes a first round of amplification using external primers and a second round of amplification using internal primers and a probe. The external primers have sequences of SEQ ID NOs. 1 and 2, and the internal primers and the probe have sequences of SEQ ID NOs. 3 to 5.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yi-Chen Li, Chih-Cheng Tsou, Min-Hsien Wu, Hsin-Yao Wang, Chien-Ru Lin
  • Patent number: 11955385
    Abstract: A semiconductor device includes a first stack structure, a second stack structure, and a third stack structure. Each of the stack structure includes semiconductor layers vertically spaced from one another. The first, second, and third stack structures all extend along a first lateral direction. The second stack structure is disposed between the first and third stack structures. The semiconductor device includes a first gate structure that extends along a second lateral direction and wraps around each of the semiconductor layers. The semiconductor layers of the first stack structure are coupled with respective source/drain structures. The semiconductor layers of the second stack structure are coupled with respective source/drain structures. The semiconductor layers of the third stack structure are coupled with a dielectric passivation layer.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Chen-Ping Chen, Hsiao Wen Lee
  • Patent number: 11942529
    Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. Each of the plurality of semiconductor layers extends along a first lateral direction. The semiconductor device includes a gate structure that extends along a second lateral direction and comprises at least a lower portion that wraps around each of the plurality of semiconductor layers. The lower portion of the gate structure comprises a plurality of first gate sections that are laterally aligned with the plurality of semiconductor layers, respectively, and wherein each of the plurality of first gate sections has ends that each extend along the second lateral direction and present a first curvature-based profile.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Hsiao Wen Lee
  • Patent number: 11942396
    Abstract: A heterogeneous integration semiconductor package structure including a heat dissipation assembly, multiple chips, a package assembly, multiple connectors and a circuit substrate is provided. The heat dissipation assembly has a connection surface and includes a two-phase flow heat dissipation device and a first redistribution structure layer embedded in the connection surface. The chips are disposed on the connection surface of the heat dissipation assembly and electrically connected to the first redistribution structure layer. The package assembly surrounds the chips and includes a second redistribution structure layer disposed on a lower surface and multiple conductive vias electrically connected to the first redistribution structure layer and the second redistribution structure layer. The connectors are disposed on the package assembly and electrically connected to the second redistribution structure layer.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: March 26, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Heng-Chieh Chien, Shu-Jung Yang, Yu-Min Lin, Chih-Yao Wang, Yu-Lin Chao
  • Patent number: 11942363
    Abstract: A method includes etching a semiconductor substrate to form a trench, with the semiconductor substrate having a sidewall facing the trench, and depositing a first semiconductor layer extending into the trench. The first semiconductor layer includes a first bottom portion at a bottom of the trench, and a first sidewall portion on the sidewall of the semiconductor substrate. The first sidewall portion is removed to reveal the sidewall of the semiconductor substrate. The method further includes depositing a second semiconductor layer extending into the trench, with the second semiconductor layer having a second bottom portion over the first bottom portion, and a second sidewall portion contacting the sidewall of the semiconductor substrate. The second sidewall portion is removed to reveal the sidewall of the semiconductor substrate.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Kuei-Yu Kao, Chen-Ping Chen, Chih-Han Lin
  • Publication number: 20240096893
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Ming-Ching Chang, Wei-Liang Lu, Kuei-Yu Kao
  • Publication number: 20240096705
    Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
  • Publication number: 20240097007
    Abstract: A semiconductor device is described. An isolation region is disposed on the substrate. A plurality of channels extend through the isolation region from the substrate. The channels including an active channel and an inactive channel. A dummy fin is disposed on the isolation region and between the active channel and the inactive channel. An active gate is disposed over the active channel and the inactive channel, and contacts the isolation region. A dielectric material extends through the active gate and contacts a top of the dummy fin. The inactive channel is a closest inactive channel to the dielectric material. A long axis of the active channel extends in a first direction. A long axis of the active gate extends in a second direction. The active channel extends in a third direction from the substrate. The dielectric material is closer to the inactive channel than to the active channel.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Hsiao Wen Lee, Ya-Yi Tsai, Shu-Uei Jang, Chih-Han Lin, Shu-Yuan Ku
  • Patent number: 11923440
    Abstract: A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yao Lin, Chen-Ping Chen, Kuei-Yu Kao, Hsiao Wen Lee, Chih-Han Lin
  • Patent number: 11552245
    Abstract: A conductive bridge random access memory and its manufacturing method are provided. The conductive bridge random access memory includes a bottom electrode, an inter-metal dielectric, a resistance switching assembly, and a top electrode. The bottom electrode is disposed on a substrate, and the inter-metal dielectric is disposed above the bottom electrode. The resistance switching assembly is disposed on the bottom electrode and positioned in the inter-metal dielectric. The resistance switching assembly has a reverse T-shape cross-section. The top electrode is disposed on the resistance switching assembly and the inter-metal dielectric.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: January 10, 2023
    Assignee: WINDBOND ELECTRONICS CORP.
    Inventors: Chih-Yao Lin, Po-Yen Hsu, Bo-Lun Wu
  • Publication number: 20210273159
    Abstract: A conductive bridge random access memory and its manufacturing method are provided. The conductive bridge random access memory includes a bottom electrode, an inter-metal dielectric, a resistance switching assembly, and a top electrode. The bottom electrode is disposed on a substrate, and the inter-metal dielectric is disposed above the bottom electrode. The resistance switching assembly is disposed on the bottom electrode and positioned in the inter-metal dielectric. The resistance switching assembly has a reverse T-shape cross-section. The top electrode is disposed on the resistance switching assembly and the inter-metal dielectric.
    Type: Application
    Filed: February 27, 2020
    Publication date: September 2, 2021
    Applicant: Winbond Electronics Corp.
    Inventors: Chih-Yao LIN, Po-Yen HSU, Bo-Lun WU
  • Publication number: 20200045000
    Abstract: A notification system capable of attaching pictures includes an editing device, a server, and multiple receiving devices. The editing device includes a data input module for inputting notification editing information. The notification editing information includes at least a picture datum and at least a URL link datum. The server is communicatively connected to the editing device for receiving the notification editing information. The server includes an insert module provided for receiving the notification editing information and inserting the notification editing information into notification information. The receiving device is communicatively connected to the server and includes a receiving module and a display module. The receiving module is provided for receiving the notification information, and the display module is provided for displaying the notification information.
    Type: Application
    Filed: August 1, 2019
    Publication date: February 6, 2020
    Applicant: AVIVID INNOVATIVE MEDIA CO., LTD
    Inventor: CHIH-YAO LIN
  • Publication number: 20180232783
    Abstract: A web-push notification advertising network system comprises a plurality of secondary servers, a plurality of receiving ends, a plurality of push-notification ends and a main server. Each of the secondary servers has a different domain name, and further includes a push-notification function module. Each of the receiving ends is connected to at least one of the secondary servers. Each of the secondary servers is connected to at least one of the push-notification ends; and the main server includes a database. The database stores user information of all the receiving ends. wherein, the push-notification end sends a push notification message to the corresponding receiving end by the push-notification function module through the secondary server. The secondary server sends to the push notification message to the non-corresponding receiving ends through the main server. Then, the push notification message is sent to other receiving ends via the other secondary servers.
    Type: Application
    Filed: July 13, 2017
    Publication date: August 16, 2018
    Inventors: Chih Yao Lin, Tzu-Ming Lin, Chia-Hung Tsou, Wei-Kuang Lai
  • Patent number: 9685408
    Abstract: A contact pad structure includes alternately stacked N insulating layers (N?6) and N conductive layers, and has N regions arranged in a 2D array exposing the respective conductive layers. When the conductive layers are numbered as first to N-th from bottom to top, the number (Ln) of exposed conductive layer decreases in a column direction in the regions of any row, the difference in Ln is fixed between two neighboring rows of regions, Ln decreases from the two ends toward the center in the regions of any column, and the difference in Ln is fixed between two neighboring columns of regions.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: June 20, 2017
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Yu-Wei Jiang, Teng-Hao Yeh, Chia-Jung Chiou, Chih-Yao Lin
  • Patent number: 9508645
    Abstract: A contact pad structure includes alternately stacked N insulating layers (N?6) and N conductive layers, and has N regions arranged in a 2D array exposing the respective conductive layers. When the conductive layers are numbered as first to N-th from bottom to top, the number (Ln) of exposed conductive layer decreases in a column direction in the regions of any row, the difference in Ln is fixed between two neighboring rows of regions, Ln decreases from the two ends toward the center in the regions of any column, and the difference in Ln is fixed between two neighboring columns of regions.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: November 29, 2016
    Assignee: MACRONIX International Co., Ltd.
    Inventor: Chih-Yao Lin
  • Publication number: 20160132956
    Abstract: An electronic commerce platform is communicatively connected to a plurality of electronic devices each of which including a carrier. The electronic commerce platform includes a commodity managing module and a server. The commodity managing module is configured to receive at least a commodity information having a commodity characteristic and to transmit the commodity information to the server. The server includes a shopping interface producer and a match module. The shopping interface producer is configured to produce a shopping interface based on the commodity information. The match module is configured to transmit the commodity information to a matched carrier. The electronic device is configured to be communicatively connected to the shopping interface when a user clicks the commodity information shown on the carrier.
    Type: Application
    Filed: November 2, 2015
    Publication date: May 12, 2016
    Inventors: Chih Yao Lin, Hsiao-Chuan Pan, Lu-Jen Wang, Guo-Xuan Hong
  • Patent number: 9084011
    Abstract: A method for advertising based on audio/video (AV) content is to be implemented by an electronic device and includes the steps of: receiving target information from an advertising broadcast server; accessing AV data for playback, followed by extracting a sample which corresponds to a portion of content of the AV data; comparing the sample thus extracted with the target information received from the advertising broadcast server; when the sample includes content that matches the target information, transmitting a confirmation message to the advertising broadcast server; and receiving an advertisement file corresponding to the target information and transmitted by the advertising broadcast server for playback.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: July 14, 2015
    Inventor: Chih-Yao Lin
  • Publication number: 20140317655
    Abstract: A method for advertising based on audio/video (AV) content is to be implemented by an electronic device and includes the steps of: receiving target information from an advertising broadcast server; accessing AV data for playback, followed by extracting a sample which corresponds to a portion of content of the AV data; comparing the sample thus extracted with the target information received from the advertising broadcast server; when the sample includes content that matches the target information, transmitting a confirmation message to the advertising broadcast server; and receiving an advertisement file corresponding to the target information and transmitted by the advertising broadcast server for playback.
    Type: Application
    Filed: April 14, 2014
    Publication date: October 23, 2014
    Inventor: Chih-Yao Lin