Patents by Inventor Chih Yen Chang

Chih Yen Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12254119
    Abstract: Examples described herein relate to a security management system to secure a container ecosystem. In some examples, the security management system may protect one or more entities such as container management applications, container images, containers, and/or executable applications within the containers. The security management system may make use of digital cryptography to generate digital signatures corresponding to one or more of these entities and verify them during the execution so that any compromised entities can be blocked from execution and the container ecosystem may be safeguarded from any malicious network attacks.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: March 18, 2025
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Wan-Yen Hsu, Chih-Hao Chang, Lin-Chan Hsiao
  • Publication number: 20250081730
    Abstract: A display may include an array of pixels such as light-emitting diode pixels. The pixels may include multiple circuitry decks that each include one or more circuit components such as transistors, capacitors, and/or resistors. The circuitry decks may be vertically stacked. Each circuitry deck may include a planarization layer formed from a siloxane material that conforms to underlying components and provides a planar upper surface. In this way, circuitry components may be vertically stacked to mitigate the size of each pixel footprint. The circuitry components may include capacitors that include both a high-k dielectric layer and a low-k dielectric layer. The display pixel may include a via with a width of less than 1 micron.
    Type: Application
    Filed: June 26, 2024
    Publication date: March 6, 2025
    Inventors: Andrew Lin, Alper Ozgurluk, Chao Liang Chien, Cheuk Chi Lo, Chia-Yu Chen, Chien-Chung Wang, Chih Pang Chang, Chih-Hung Yu, Chih-Wei Chang, Chin Wei Hsu, ChinWei Hu, Chun-Kai Tzeng, Chun-Ming Tang, Chun-Yao Huang, Hung-Che Ting, Jung Yen Huang, Lungpao Hsin, Shih Chang Chang, Tien-Pei Chou, Wen Sheng Lo, Yu-Wen Liu, Yung Da Lai
  • Publication number: 20250066899
    Abstract: A method includes: positioning a wafer on an electrostatic chuck of a physical vapor deposition apparatus, the wafer including an opening exposing a conductive feature; setting a temperature of the wafer to a room temperature; forming a tungsten thin film in the opening by the physical vapor deposition apparatus, the tungsten thin film including a bottom portion that is on an upper surface of the conductive feature exposed by the opening, a top portion that is on an upper surface of a dielectric layer through which the opening extends and a sidewall portion that is on a sidewall of the dielectric layer exposed by the opening; removing the top portion and the sidewall portion of the tungsten thin film from over the opening; and forming a tungsten plug in the opening on the bottom portion by selectively depositing tungsten by a chemical vapor deposition operation.
    Type: Application
    Filed: August 23, 2023
    Publication date: February 27, 2025
    Inventors: Chun-Yen LIAO, I. LEE, Shu-Lan CHANG, Sheng-Hsuan LIN, Feng-Yu CHANG, Wei-Jung LIN, Chun-I TSAI, Chih-Chien CHI, Ming-Hsing TSAI, Pei Shan CHANG, Chih-Wei CHANG
  • Patent number: 12218203
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a fin active region formed on a semiconductor substrate and spanning between a first sidewall of a first shallow trench isolation (STI) feature and a second sidewall of a second STI feature; an anti-punch through (APT) feature of a first type conductivity; and a channel material layer of the first type conductivity, disposed on the APT feature and having a second doping concentration less than the first doping concentration. The APT feature is formed on the fin active region, spans between the first sidewall and the second sidewall, and has a first doping concentration.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yi Peng, Ling-Yen Yeh, Chi-Wen Liu, Chih-Sheng Chang, Yee-Chia Yeo
  • Patent number: 12211836
    Abstract: A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.
    Type: Grant
    Filed: June 27, 2023
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Wen Chang, Hong-Nien Lin, Chien-Hsing Lee, Chih-Sheng Chang, Ling-Yen Yeh, Wilman Tsai, Yee-Chia Yeo
  • Patent number: 8624708
    Abstract: An item positioning system is provided. The item positioning system comprises a plurality of tag readers and a control device. The plurality of tag readers generate access signals respectively and receive a response signal from a target tag. The control device adjusts transmitting power of the access signals of the tag readers, and determines a position of the target item according to whether the tag readers receive the response signal.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: January 7, 2014
    Assignee: MStar Semiconductor, Inc.
    Inventor: Chih Yen Chang
  • Patent number: 8552756
    Abstract: A chip testing apparatus and a chip testing method are provided. The chip testing apparatus includes a command generating module, a transceiving module and a control module. When the command generating module generates a first test command, the transceiving module transmits the first test command to a radio frequency identification (RFID) chip and receives a target test result from the RFID chip. The control module determines whether the target test result complies with a reference test result. When the determination result of the control module is no, the control module controls the command generating module to generate a second test command for retesting the RFID chip.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: October 8, 2013
    Assignee: Mstar Semiconductor, Inc.
    Inventors: Chih Hua Huang, Chih Yen Chang
  • Patent number: 8362880
    Abstract: A method and apparatus for loading and executing program code at a micro-processor are disclosed. In this method, a monitoring procedure is performed to monitor whether the micro-processor receives a loading request corresponding to a target program code. If the loading request is received, the target program code is loaded from an external memory into an internal memory of the micro-processor. The micro-processor is then rebooted to enter a first mode in which the target program code in the internal memory is to be executed.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: January 29, 2013
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chih-Hua Huang, Chih Yen Chang
  • Patent number: 8352965
    Abstract: A circuit device capable of automatic transmission interface selection and associated method are provided. The circuit device includes a first interface port, a second interface port, a first interface driver module, a second interface driver module, and a buffer module. A first interface driver module receives a first interrupt packet, converts the first interrupt packet into a first command packet, and stores the first command packet into the buffer module. A second interface driver module receives a second interrupt packet, converts the second interrupt packet into a second command packet, and stores the second command package into the buffer module. The format of the first interrupt packet is different from that of the second interrupt packet, while the first and the second command packets comply with a common format.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: January 8, 2013
    Assignee: Mstar Semiconductor, Inc.
    Inventor: Chih Yen Chang
  • Publication number: 20100102928
    Abstract: A monitoring apparatus and the associated method are provided. The monitoring apparatus includes a tag reading module and a control module. The tag reading module accesses a target tag attached to a target object to generate an access signal. The control module is coupled to the tag reading module and receives the access signal. When the control module operates in an alert mode, the control module selectively generates a control signal according to a reading condition of the access signal.
    Type: Application
    Filed: October 2, 2009
    Publication date: April 29, 2010
    Applicant: MSTAR SEMICONDUCTOR, INC.
    Inventor: Chih Yen Chang
  • Publication number: 20100088709
    Abstract: A circuit device capable of automatic transmission interface selection and associated method are provided. The circuit device includes a first interface port, a second interface port, a first interface driver module, a second interface driver module, and a buffer module. A first interface driver module receives a first interrupt packet, converts the first interrupt packet into a first command packet, and stores the first command packet into the buffer module. A second interface driver module receives a second interrupt packet, converts the second interrupt packet into a second command packet, and stores the second command package into the buffer module. The format of the first interrupt packet is different from that of the second interrupt packet, while the first and the second command packets comply with a common format.
    Type: Application
    Filed: October 2, 2009
    Publication date: April 8, 2010
    Applicant: MStar Semiconductor, Inc.
    Inventor: Chih Yen Chang
  • Publication number: 20100079257
    Abstract: An item positioning system is provided. The item positioning system comprises a plurality of tag readers and a control device. The plurality of tag readers generate access signals respectively and receive a response signal from a target tag. The control device adjusts transmitting power of the access signals of the tag readers, and determines a position of the target item according to whether the tag readers receive the response signal.
    Type: Application
    Filed: August 25, 2009
    Publication date: April 1, 2010
    Applicant: MSTAR SEMICONDUCTOR, INC.
    Inventor: Chih Yen Chang
  • Publication number: 20100052696
    Abstract: A chip testing apparatus and a chip testing method are provided. The chip testing apparatus includes a command generating module, a transceiving module and a control module. When the command generating module generates a first test command, the transceiving module transmits the first test command to a radio frequency identification (RFID) chip and receives a target test result from the RFID chip. The control module determines whether the target test result complies with a reference test result. When the determination result of the control module is no, the control module controls the command generating module to generate a second test command for retesting the RFID chip.
    Type: Application
    Filed: August 26, 2009
    Publication date: March 4, 2010
    Applicant: MStar Semiconductor, Inc.
    Inventors: Chih-Hua Huang, Chih Yen Chang
  • Publication number: 20090278667
    Abstract: A method and apparatus for loading and executing program code at a micro-processor are disclosed. In this method, a monitoring procedure is performed to monitor whether the micro-processor receives a loading request corresponding to a target program code. If the loading request is received, the target program code is loaded from an external memory into an internal memory of the micro-processor. The micro-processor is then rebooted to enter a first mode in which the target program code in the internal memory is to be executed.
    Type: Application
    Filed: April 27, 2009
    Publication date: November 12, 2009
    Applicant: MStar semiconductor, Inc.
    Inventors: CHIH-HUA HUANG, CHIH YEN CHANG