Patents by Inventor Chih Yen Chang
Chih Yen Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240404900Abstract: A method for forming a semiconductor package is provided. The method includes forming a first photonic routing structure over a substrate, disposing the first photonic routing structure over a redistribution structure, disposing a second photonic routing structure and an optical engine die on the redistribution structure and forming a molding structure between and separating the first photonic routing structure and the second photonic routing structure.Type: ApplicationFiled: May 31, 2023Publication date: December 5, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chuei-Tang WANG, Tso-Jung CHANG, Jeng-Shien HSIEH, Chih-Peng LIN, Chieh-Yen CHEN, Chen-Hua YU
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Publication number: 20240395550Abstract: A method for fabricating a semiconductor device is provided. The method includes coating a photoresist film over a target layer over a semiconductor substrate; performing a lithography process to pattern the photoresist film into a photoresist layer; performing a directional ion bombardment process to the photoresist layer along a direction tilted with respect to a normal direction of the semiconductor substrate, such that a carbon atomic concentration in the photoresist layer is increased; and etching the target layer using the photoresist layer as an etch mask.Type: ApplicationFiled: July 30, 2024Publication date: November 28, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Tien SHEN, Chih-Kai YANG, Hsiang-Ming CHANG, Chun-Yen CHANG, Ya-Hui CHANG, Wei-Ting CHIEN, Chia-Cheng CHEN, Liang-Yin CHEN
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Publication number: 20240387149Abstract: The current disclosure includes a plasma etching system that includes a movable plasma source and a moveable wafer stage. A relative position between the movable plasma source and the movable wafer stage can be varied to set up an angle along which plasma particles of the plasma hits a wafer positioned on the wafer stage.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Inventors: Chun-Yen CHANG, Yu-Tien SHEN, Chih-Kai YANG, Ya-Hui CHANG, Shih-Ming CHANG
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Publication number: 20240371810Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.Type: ApplicationFiled: July 14, 2024Publication date: November 7, 2024Inventors: Hsin-Chi CHEN, Hsun-Ying HUANG, Chih-Ming LEE, Shang-Yen WU, Chih-An YANG, Hung-Wei HO, Chao-Ching CHANG, Tsung-Wei HUANG
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Publication number: 20240371813Abstract: A semiconductor package includes a substrate, a semiconductor device over the substrate and a plurality of solder joint structures bonded between the semiconductor device and the substrate, wherein each of the plurality of solder joint structures includes, by weight percent, 2% to 23% of Indium (In).Type: ApplicationFiled: July 15, 2024Publication date: November 7, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jen-Jui Yu, Chih-Chiang Tsao, Hsuan-Ting Kuo, Mao-Yen Chang, Hsiu-Jen Lin, Ching-Hua Hsieh, Hao-Jan Pei
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Patent number: 12136659Abstract: Negative capacitance field-effect transistor (NCFET) and ferroelectric field-effect transistor (FE-FET) devices and methods of forming are provided. The gate dielectric stack includes a ferroelectric gate dielectric layer. An amorphous high-k dielectric layer and a dopant-source layer are deposited sequentially followed by a post-deposition anneal (PDA). The PDA converts the amorphous high-k layer to a polycrystalline high-k film with crystalline grains stabilized by the dopants in a crystal phase in which the high-k dielectric is a ferroelectric high-k dielectric. After the PDA, the remnant dopant-source layer may be removed. A gate electrode is formed over remnant dopant-source layer (if present) and the polycrystalline high-k film.Type: GrantFiled: July 31, 2023Date of Patent: November 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Te-Yang Lai, Chun-Yen Peng, Chih-Yu Chang, Bo-Feng Young, Sai-Hooi Yeong, Chi On Chui
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Patent number: 12135826Abstract: Examples described herein relate to a security management system to secure a container ecosystem. In some examples, the security management system may protect one or more entities such as container management applications, container images, containers, and/or executable applications within the containers. The security management system may make use of digital cryptography to generate digital signatures corresponding to one or more of these entities and verify them during the execution so that any compromised entities can be blocked from execution and the container ecosystem may be safeguarded from any malicious network attacks.Type: GrantFiled: September 6, 2022Date of Patent: November 5, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Wan-Yen Hsu, Chih-Hao Chang, Lin-Chan Hsiao
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Patent number: 12124617Abstract: Examples described herein relate to a security management system to secure a container ecosystem. In some examples, the security management system may protect one or more entities such as container management applications, container images, containers, and/or executable applications within the containers. The security management system may make use of digital cryptography to generate digital signatures corresponding to one or more of these entities and verify them during the execution so that any compromised entities can be blocked from execution and the container ecosystem may be safeguarded from any malicious network attacks.Type: GrantFiled: September 7, 2022Date of Patent: October 22, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Wan-Yen Hsu, Chih-Hao Chang, Lin-Chan Hsiao
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Patent number: 12107064Abstract: A semiconductor package includes a substrate, a semiconductor device over the substrate and a plurality of solder joint structures bonded between the semiconductor device and the substrate, wherein each of the plurality of solder joint structures includes, by weight percent, 2% to 23% of Indium (In).Type: GrantFiled: April 13, 2022Date of Patent: October 1, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jen-Jui Yu, Chih-Chiang Tsao, Hsuan-Ting Kuo, Mao-Yen Chang, Hsiu-Jen Lin, Ching-Hua Hsieh, Hao-Jan Pei
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Patent number: 12094691Abstract: The current disclosure includes a plasma etching system that includes a movable plasma source and a moveable wafer stage. A relative position between the movable plasma source and the movable wafer stage can be varied to set up an angle along which plasma particles of the plasma hits a wafer positioned on the wafer stage.Type: GrantFiled: July 7, 2021Date of Patent: September 17, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chun-Yen Chang, Yu-Tien Shen, Chih-Kai Yang, Ya-Hui Chang, Shih-Ming Chang
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Patent number: 12096657Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to associated semiconducting oxide transistors. The semiconducting oxide transistors may exhibit different device characteristics. Some of the semiconducting oxide transistors may be formed using a first oxide layer formed from a first semiconducting oxide material using first processing steps, whereas other semiconducting oxide transistors are formed using a second oxide layer formed from a second semiconducting oxide material using second processing steps different than the first processing steps. The display may include three or more different semiconducting oxide layers formed during different processing steps.Type: GrantFiled: October 18, 2021Date of Patent: September 17, 2024Assignee: Apple Inc.Inventors: Jung Yen Huang, Shinya Ono, Chin-Wei Lin, Akira Matsudaira, Cheng Min Hu, Chih Pang Chang, Ching-Sang Chuang, Gihoon Choo, Jiun-Jye Chang, Po-Chun Yeh, Shih Chang Chang, Yu-Wen Liu, Zino Lee
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Patent number: 12068271Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.Type: GrantFiled: July 23, 2023Date of Patent: August 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Chi Chen, Hsun-Ying Huang, Chih-Ming Lee, Shang-Yen Wu, Chih-An Yang, Hung-Wei Ho, Chao-Ching Chang, Tsung-Wei Huang
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Publication number: 20240251568Abstract: A semiconductor device includes a substrate; a memory array over the substrate, the memory array including first magnetic tunnel junctions (MTJs), where the first MTJs are in a first dielectric layer over the substrate; and a resistor circuit over the substrate, the resistor circuit including second MTJs, where the second MTJs are in the first dielectric layer.Type: ApplicationFiled: April 4, 2024Publication date: July 25, 2024Inventors: Tai-Yen Peng, Tsung-Hsien Chang, Yu-Shu Chen, Chih-Yuan Ting, Jyu-Horng Shieh, Chung-Te Lin
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Patent number: 8624708Abstract: An item positioning system is provided. The item positioning system comprises a plurality of tag readers and a control device. The plurality of tag readers generate access signals respectively and receive a response signal from a target tag. The control device adjusts transmitting power of the access signals of the tag readers, and determines a position of the target item according to whether the tag readers receive the response signal.Type: GrantFiled: August 25, 2009Date of Patent: January 7, 2014Assignee: MStar Semiconductor, Inc.Inventor: Chih Yen Chang
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Patent number: 8552756Abstract: A chip testing apparatus and a chip testing method are provided. The chip testing apparatus includes a command generating module, a transceiving module and a control module. When the command generating module generates a first test command, the transceiving module transmits the first test command to a radio frequency identification (RFID) chip and receives a target test result from the RFID chip. The control module determines whether the target test result complies with a reference test result. When the determination result of the control module is no, the control module controls the command generating module to generate a second test command for retesting the RFID chip.Type: GrantFiled: August 26, 2009Date of Patent: October 8, 2013Assignee: Mstar Semiconductor, Inc.Inventors: Chih Hua Huang, Chih Yen Chang
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Patent number: 8362880Abstract: A method and apparatus for loading and executing program code at a micro-processor are disclosed. In this method, a monitoring procedure is performed to monitor whether the micro-processor receives a loading request corresponding to a target program code. If the loading request is received, the target program code is loaded from an external memory into an internal memory of the micro-processor. The micro-processor is then rebooted to enter a first mode in which the target program code in the internal memory is to be executed.Type: GrantFiled: April 27, 2009Date of Patent: January 29, 2013Assignee: MStar Semiconductor, Inc.Inventors: Chih-Hua Huang, Chih Yen Chang
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Patent number: 8352965Abstract: A circuit device capable of automatic transmission interface selection and associated method are provided. The circuit device includes a first interface port, a second interface port, a first interface driver module, a second interface driver module, and a buffer module. A first interface driver module receives a first interrupt packet, converts the first interrupt packet into a first command packet, and stores the first command packet into the buffer module. A second interface driver module receives a second interrupt packet, converts the second interrupt packet into a second command packet, and stores the second command package into the buffer module. The format of the first interrupt packet is different from that of the second interrupt packet, while the first and the second command packets comply with a common format.Type: GrantFiled: October 2, 2009Date of Patent: January 8, 2013Assignee: Mstar Semiconductor, Inc.Inventor: Chih Yen Chang
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Publication number: 20100102928Abstract: A monitoring apparatus and the associated method are provided. The monitoring apparatus includes a tag reading module and a control module. The tag reading module accesses a target tag attached to a target object to generate an access signal. The control module is coupled to the tag reading module and receives the access signal. When the control module operates in an alert mode, the control module selectively generates a control signal according to a reading condition of the access signal.Type: ApplicationFiled: October 2, 2009Publication date: April 29, 2010Applicant: MSTAR SEMICONDUCTOR, INC.Inventor: Chih Yen Chang
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Publication number: 20100088709Abstract: A circuit device capable of automatic transmission interface selection and associated method are provided. The circuit device includes a first interface port, a second interface port, a first interface driver module, a second interface driver module, and a buffer module. A first interface driver module receives a first interrupt packet, converts the first interrupt packet into a first command packet, and stores the first command packet into the buffer module. A second interface driver module receives a second interrupt packet, converts the second interrupt packet into a second command packet, and stores the second command package into the buffer module. The format of the first interrupt packet is different from that of the second interrupt packet, while the first and the second command packets comply with a common format.Type: ApplicationFiled: October 2, 2009Publication date: April 8, 2010Applicant: MStar Semiconductor, Inc.Inventor: Chih Yen Chang
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Publication number: 20100079257Abstract: An item positioning system is provided. The item positioning system comprises a plurality of tag readers and a control device. The plurality of tag readers generate access signals respectively and receive a response signal from a target tag. The control device adjusts transmitting power of the access signals of the tag readers, and determines a position of the target item according to whether the tag readers receive the response signal.Type: ApplicationFiled: August 25, 2009Publication date: April 1, 2010Applicant: MSTAR SEMICONDUCTOR, INC.Inventor: Chih Yen Chang