Patents by Inventor Chih-Yi Chang
Chih-Yi Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230154850Abstract: A graphene liner deposited between at least one liner material (e.g., barrier layer, ruthenium liner, and/or cobalt liner) and a copper conductive structure reduces surface scattering at an interface between the at least one liner material and the copper conductive structure. Additionally, or alternatively, the carbon-based liner reduces contact resistance at an interface between the at least one liner material and the copper conductive structure. A carbon-based cap may additionally or alternatively be deposited on a metal cap, over the copper conductive structure, to reduce surface scattering at an interface between the metal cap and an additional copper conductive structure deposited over the metal cap.Type: ApplicationFiled: January 11, 2022Publication date: May 18, 2023Inventors: Shu-Cheng CHIN, Chih-Yi CHANG, Chih-Chien CHI, Ming-Hsing TSAI
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Patent number: 11527476Abstract: A semiconductor structure and a method of forming the same are provided. A method includes depositing a dielectric layer over a conductive feature. The dielectric layer is patterned to form an opening therein. The opening exposes a first portion of the conductive feature. A first barrier layer is deposited on a sidewall of the opening. The first portion of the conductive feature remains exposed at the end of depositing the first barrier layer.Type: GrantFiled: January 7, 2021Date of Patent: December 13, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yao-Min Liu, Chia-Pang Kuo, Chien Chung Huang, Chih-Yi Chang, Ya-Lien Lee, Chun-Chieh Lin, Hung-Wen Su, Ming-Hsing Tsai
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Publication number: 20220367266Abstract: A method includes forming a first conductive feature, depositing a graphite layer over the first conductive feature, patterning the graphite layer to form a graphite conductive feature, depositing a dielectric spacer layer on the graphite layer, depositing a first dielectric layer over the dielectric spacer layer, planarizing the first dielectric layer, forming a second dielectric layer over the first dielectric layer, and forming a second conductive feature in the second dielectric layer. The second conductive feature is over and electrically connected to the graphite conductive feature.Type: ApplicationFiled: July 21, 2021Publication date: November 17, 2022Inventors: Shu-Cheng Chin, Chih-Yi Chang, Wei Hsiang Chan, Chih-Chien Chi, Chi-Feng Lin, Hung-Wen Su
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Publication number: 20220084937Abstract: A semiconductor structure and a method of forming the same are provided. A method includes depositing a dielectric layer over a conductive feature. The dielectric layer is patterned to form an opening therein. The opening exposes a first portion of the conductive feature. A first barrier layer is deposited on a sidewall of the opening. The first portion of the conductive feature remains exposed at the end of depositing the first barrier layer.Type: ApplicationFiled: January 7, 2021Publication date: March 17, 2022Inventors: Yao-Min Liu, Chia-Pang Kuo, Chien Chung Huang, Chih-Yi Chang, Ya-Lien Lee, Chun-Chieh Lin, Hung-Wen Su, Ming-Hsing Tsai
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Publication number: 20220068826Abstract: A structure includes a first conductive feature in a first dielectric layer; a second dielectric layer over the first dielectric layer; and a second conductive feature extending through the second dielectric layer to physically contact the first conductive feature, wherein the second conductive feature includes a metal adhesion layer over and physically contacting the first conductive feature; a barrier layer extending along sidewalls of the second dielectric layer; and a conductive filling material extending over the metal adhesion layer and the barrier layer, wherein a portion of the conductive filling material extends between the barrier layer and the metal adhesion layer.Type: ApplicationFiled: August 25, 2020Publication date: March 3, 2022Inventors: Chia-Pang Kuo, Chih-Yi Chang, Ming-Hsiao Hsieh, Wei-Hsiang Chan, Ya-Lien Lee, Chien Chung Huang, Chun-Chieh Lin, Hung-Wen Su
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Patent number: 9786604Abstract: A method of forming a metal layer may include forming an opening in a substrate; forming a liner over sidewalls of the opening; filling the opening with a first metal; etching a top surface of the first metal to form a recessed top surface below a top surface of the substrate; and exposing the recessed top surface of the first metal to a solution, the solution containing a second metal different from the first metal, the exposing causing the recessed top surface of the first metal to attract the second metal to form a cap layer over the recessed top surface of the first metal.Type: GrantFiled: November 10, 2015Date of Patent: October 10, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Yuan Kao, Hung-Wen Su, Chih-Yi Chang, Liang-Yueh Ou Yang
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Patent number: 9632498Abstract: A computer-implemented system and method of compensating for filling material losses in a semiconductor process. The computer-implemented method includes determining using a computer a pattern density difference between a first circuit pattern above a semiconductor substrate and a second circuit pattern adjacent to the first pattern. A dummy pattern is inserted between the first pattern and the second pattern so as to compensate for an estimated loss of filling material induced during electrochemical plating by the pattern density difference exceeding a threshold pattern density difference.Type: GrantFiled: April 25, 2013Date of Patent: April 25, 2017Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Yi Chang, Liang-Yueh Ou Yang, Chen-Yuan Kao, Hung-Wen Su
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Patent number: 9476135Abstract: The present disclosure relates to an electro-chemical plating (ECP) process which utilizes a dummy electrode as a cathode to perform plating for sustained idle times to mitigate additive dissociation. The dummy electrode also allows for localized plating function to improve product gapfill, and decrease wafer non-uniformity. A wide range of electroplating recipes may be applied with this strategy, comprising current plating up to approximately 200 Amps, localized plating with a resolution of approximately 1 mm, and reverse plating to remove material from the dummy electrode accumulated during the dummy plating process and replenish ionic material within the electroplating solution.Type: GrantFiled: April 9, 2013Date of Patent: October 25, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Yi Chang, Liang-Yueh Ou Yang, Chen-Yuan Kao, Hung-Wen Su
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Publication number: 20160064332Abstract: A method of forming a metal layer may include forming an opening in a substrate; forming a liner over sidewalls of the opening; filling the opening with a first metal; etching a top surface of the first metal to form a recessed top surface below a top surface of the substrate; and exposing the recessed top surface of the first metal to a solution, the solution containing a second metal different from the first metal, the exposing causing the recessed top surface of the first metal to attract the second metal to form a cap layer over the recessed top surface of the first metal.Type: ApplicationFiled: November 10, 2015Publication date: March 3, 2016Inventors: Chen-Yuan Kao, Hung-Wen Su, Chih-Yi Chang, Liang-Yueh Ou Yang
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Patent number: 9209073Abstract: Presented herein is a method for electrolessly forming a metal cap in a via opening, comprising bringing a via into contact with metal solution, the via disposed in an opening in a substrate, and forming a metal cap in the opening and in contact with the via, the metal cap formed by an electroless chemical reaction. A metal solution may be applied to the via to form the metal cap. The metal solution may comprises at least cobalt and the cap may comprise at least cobalt, and may optionally further comprise tungsten, and wherein the forming the cap comprises forming the cap to further comprise at least tungsten. The metal solution may further comprise at least hypophosphite or dimethylaminoborane.Type: GrantFiled: March 25, 2013Date of Patent: December 8, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Liang-Yueh Ou Yang, Chih-Yi Chang, Chen-Yuan Kao, Hung-Wen Su
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Patent number: 9085696Abstract: The present invention provides a novel black photosensitive resin composition, which includes: a polysiloxane, a black pigment, an alkali-soluble resin, a photopolymerizable compound, a photopolymerization initiator and a solvent. Accordingly, the black photosensitive resin composition of the present invention can meet the requirements for optical density and resistance under high temperature and is advantageous to the application in a touch panel. In addition, the present invention further provides a light-blocking layer that is manufactured from the black photosensitive resin composition.Type: GrantFiled: April 10, 2013Date of Patent: July 21, 2015Assignee: EVERLIGHT USA, INC.Inventors: Fan-Sen Lin, Hui-Huan Hsu, Bo-Nan Lin, Chih-Yi Chang
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Publication number: 20140262797Abstract: The present disclosure relates to an electro-chemical plating (ECP) process which utilizes a dummy electrode as a cathode to perform plating for sustained idle times to mitigate additive dissociation. The dummy electrode also allows for localized plating function to improve product gapfill, and decrease wafer non-uniformity. A wide range of electroplating recipes may be applied with this strategy, comprising current plating up to approximately 200 Amps, localized plating with a resolution of approximately 1 mm, and reverse plating to remove material from the dummy electrode accumulated during the dummy plating process and replenish ionic material within the electroplating solution.Type: ApplicationFiled: April 9, 2013Publication date: September 18, 2014Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Yi Chang, Liang-Yueh Ou Yang, Chen-Yuan Kao, Hung-Wen Su
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Publication number: 20140277681Abstract: A computer-implemented system and method of compensating for filling material losses in a semiconductor process. The computer-implemented method includes determining using a computer a pattern density difference between a first circuit pattern above a semiconductor substrate and a second circuit pattern adjacent to the first pattern. A dummy pattern is inserted between the first pattern and the second pattern so as to compensate for an estimated loss of filling material induced during electrochemical plating by the pattern density difference exceeding a threshold pattern density difference.Type: ApplicationFiled: April 25, 2013Publication date: September 18, 2014Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Yi CHANG, Liang-Yueh Ou YANG, Chen-Yuan KAO, Hung-Wen SU
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Publication number: 20140100301Abstract: The present invention provides a novel black photosensitive resin composition, which includes: a polysiloxane, a black pigment, an alkali-soluble resin, a photopolymerizable compound, a photopolymerization initiator and a solvent. Accordingly, the black photosensitive resin composition of the present invention can meet the requirements for optical density and resistance under high temperature and is advantageous to the application in a touch panel. In addition, the present invention further provides a light-blocking layer that is manufactured from the black photosensitive resin composition.Type: ApplicationFiled: April 10, 2013Publication date: April 10, 2014Applicant: Everlight USA, Inc.Inventors: Fan-Sen LIN, Hui-Huan HSU, Bo-Nan LIN, Chih-Yi CHANG
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Publication number: 20110294067Abstract: A photosensitive resin composition is disclosed. The photosensitive resin composition includes an alkali soluble resin with an epoxy structure, a photopolymerizable compound having an ethylenically unsaturated bond, a photoinitiator, and a thermal curing agent. The photosensitive resin composition provides great surface hardness, adhesion and transmittance to meet industrial requirements.Type: ApplicationFiled: March 24, 2011Publication date: December 1, 2011Applicant: EVERLIGHT USA, INC.Inventors: Chih-Han Chao, Chun-Chin Chou, Yu-Ling Lin, Chih-Yi Chang
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Patent number: 7394503Abstract: Successive video signals of a first frame and a second frame are received. A signal difference between the video signals is determined and filtered to obtain a luminance difference. A signal sum of the video signals is determined and filtered to obtain a luminance sum. The luminance sum is subtracted from the signal sum to obtain a chrominance difference.Type: GrantFiled: June 30, 2005Date of Patent: July 1, 2008Assignees: National Sun Yat-Sen University, Himax Technologies LimitedInventors: Chua-Chin Wang, Chih-Yi Chang, Fung-Jane Chang
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Patent number: 7273538Abstract: A surface mountable laminated circuit protection device comprises a first metal layer including a first unit and a second unit, a first insulating layer disposed on the first metal layer, and a second metal layer disposed on the first insulated layer. There is also a composite electroplated layer containing carbon black disposed on the second metal layer, and a first conductive composite material having positive temperature coefficient (PTC) characteristics disposed on the composite electroplated layer containing carbon black. Above the first conductive composite material is a third metal layer. Furthermore, there is a first conducting mechanism for conducting the first metal layer and the second metal to each other; and a second conducting mechanism for conducting the third metal layer and the first metal layer to each other. The application of double-sided metal foil clad substrate simplifies the production process of the protection device and improves its structural strength and dimensional stability.Type: GrantFiled: September 25, 2003Date of Patent: September 25, 2007Assignee: Protectronics Technology CorporationInventors: Rei-Yian Chen, Chih-Yi Chang, Tung-Hsiang Liu
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Publication number: 20070002171Abstract: Successive video signals of a first frame and a second frame are received. A signal difference between the video signals is determined and filtered to obtain a luminance difference. A signal sum of the video signals is determined and filtered to obtain a luminance sum. The luminance sum is subtracted from the signal sum to obtain a chrominance difference.Type: ApplicationFiled: June 30, 2005Publication date: January 4, 2007Applicants: National Sun Yat-Sen University, Himax Technologies, Inc.Inventors: Chua-Chin Wang, Chih-Yi Chang, Fung-Jane Chang
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Patent number: 6873244Abstract: The present invention discloses a surface mountable laminated thermistor device which utilizes current-used double sided metal foil clad substrate as a base material and a PTC conductive composite that complies with circuit connection design combinations among electrodes to obtain a surface mountable laminated thermistor device with a parallel manner, and vastly simplify the fabrication process of the surface mountable laminated thermistor device.Type: GrantFiled: May 19, 2003Date of Patent: March 29, 2005Assignee: Protectronics Technology CorporationInventors: Chien-Shan Huang, Ren-Haur Hwang, Chih-Yi Chang
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Publication number: 20040069645Abstract: A surface mountable laminated circuit protection device comprises a first metal layer including a first unit and a second unit, a first insulating layer disposed on the first metal layer, and a second metal layer disposed on the first insulated layer. There is also a composite electroplated layer containing carbon black disposed on the second metal layer, and a first conductive composite material having positive temperature coefficient (PTC) characteristics disposed on the composite electroplated layer containing carbon black. Above the first conductive composite material is a third metal layer. Furthermore, there is a first conducting mechanism for conducting the first metal layer and the second metal to each other; and a second conducting mechanism for conducting the third metal layer and the first metal layer to each other. The application of double-sided metal foil clad substrate simplifies the production process of the protection device and improves its structural strength and dimensional stability.Type: ApplicationFiled: September 25, 2003Publication date: April 15, 2004Applicant: PROTECTRONICS TECHNOLOGY CORPORATIONInventors: Rei-Yian Chen, Chih-Yi Chang, Tung-Hsiang Liu