Patents by Inventor Chih-Yi Liu

Chih-Yi Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128313
    Abstract: A method includes providing a substrate, forming a patterned hard mask layer over the substrate, etching the patterned hard mask layer to form a hole that penetrates the patterned hard mask layer, forming a barrier portion in the hole, removing the patterned hard mask layer, and forming a gate structure over the substrate. Formation of the gate structure includes forming a dielectric body portion on the substrate. The barrier portion that is thicker than the dielectric body portion adjoins one end of the dielectric body portion. The dielectric body portion and the barrier portion are collectively referred to as a gate dielectric layer. Formation of the gate structure further includes forming a gate electrode on the gate dielectric layer and forming gate spacers on opposite sidewalls of the gate electrode. During formation of the gate spacers, a portion of the barrier portion is removed to form a recessed corner.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Tse-Hsiao LIU, Chih-Wei LIN, Po-Hao CHIU, Pi-Kuang CHUANG, Ching-Yi HSU
  • Patent number: 11947745
    Abstract: A handwriting data processing method is applied to a pen display having wireless communication function and a data processing device. The handwriting data processing method includes the steps of: the data processing device obtaining a handwriting data from the pen display in a wireless communication manner; the data processing device generating a compressed screen image and transmitting the data of the compressed screen image and the handwriting data, which is not compressed, to the pen display in the wireless communication manner; the pen display uncompressing the data of the compressed screen image and overlapping the uncompressed screen image and the handwriting data to form a complete screen image and displaying the complete screen image. By the handwriting processing method, the machine time of the processor of the pen display is effectively lowered, significantly reducing the delay phenomenon of the displayed handwriting.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: April 2, 2024
    Assignee: USI ELECTRONICS (SHENZHEN) CO., LTD.
    Inventors: Chih-Hsiang Chen, Chi-Hua Shih, Huang-Chu Liu, Jan-Yi Hsiao
  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Patent number: 11935804
    Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
  • Publication number: 20240088307
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240071803
    Abstract: Methods and systems for dry etching are disclosed. The system includes a wafer clamp ring having a central opening through which a substrate may be treated and a plurality of smaller, outer support holes for receiving pins from plunger assemblies. The outer support holes are tapered and change in diameter. The tapered shape reduces horizontal shifting of the wafer clamp ring which can occur as the wafer clamp ring is moved up-and-down during operational use. The reduced shifting increases wafer yield along the edges of the wafer.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Inventors: Fu-Yi Liu, Chou-Feng Lee, Chih-Hsien Hsu
  • Patent number: 8902420
    Abstract: The present invention relates to a sensor chip for biomedical and micro-nano structured substances and a method for manufacturing the same. The sensor chip includes plural metal nanoparticles and a porous anodized aluminum oxide film. The plural metal nanoparticles are completely contained in holes of the porous anodized aluminum oxide film and located at the bottom of the holes, and an aluminum oxide layer covering the second end of the holes has a thickness of 1 nm to 300 nm. When analytes such as biomedical molecules are provided in contact with the sensor chip, a Raman signal can be detected based on the Raman spectroscopy. The structure of the sensor chip of the present invention is uncomplicated and the manufacturing steps thereof are simple, and therefore the sensor chip of the present invention is of great commercial value. Also, a method of manufacturing the above sensor chip is disclosed.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: December 2, 2014
    Assignee: National Cheng Kung University
    Inventors: Yon-Hua Tzeng, Chih-Yi Liu, Chen-Han Huang, Hsing-Ying Lin, Hsiang-Chen Chui, Kyaw-Oo Lau, Shih-Tse Chen, Cheng-Wen Huang
  • Patent number: 8461511
    Abstract: A photo-sensitive composite film is disclosed, which includes plural metal nano-particles and a porous anodized aluminum oxide film. The nanoparticles can be hollow or solid with unrestricted shapes of varying diameters and lengths. The plural metal nanoparticles are completely contained in holes and attached to the bottom of the holes of the anodized aluminum oxide film, and the electrical conductivity of the photo-sensitive anodized aluminum oxide film can be changed by light exposure on the metal nanoparticles from surfaces of the anodized aluminum oxide film. The structure of the photo-sensitive anodized aluminum oxide film of the present invention is uncomplicated and the manufacturing steps thereof are simple, and therefore the photo-sensitive anodized aluminum oxide film of the present invention is of great commercial value. Also, a method of manufacturing the above photo-sensitive composite film and a photo-switched device including the same are disclosed.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: June 11, 2013
    Assignee: National Cheng Kung University
    Inventors: Yon-Hua Tzeng, Chih-Yi Liu, Kyaw-Oo Kyaw, Hsiang-Chen Chui, Chen-Han Huang, Hsing-Ying Lin
  • Publication number: 20120194813
    Abstract: The present invention relates to a sensor chip for biomedical and micro-nano structured substances and a method for manufacturing the same. The sensor chip includes plural metal nanoparticles and a porous anodized aluminum oxide film. The plural metal nanoparticles are completely contained in holes of the porous anodized aluminum oxide film and located at the bottom of the holes, and an aluminum oxide layer covering the second end of the holes has a thickness of 1 nm to 300 nm. When analytes such as biomedical molecules are provided in contact with the sensor chip, a Raman signal can be detected based on the Raman spectroscopy. The structure of the sensor chip of the present invention is uncomplicated and the manufacturing steps thereof are simple, and therefore the sensor chip of the present invention is of great commercial value. Also, a method of manufacturing the above sensor chip is disclosed.
    Type: Application
    Filed: December 27, 2011
    Publication date: August 2, 2012
    Applicant: National Cheng Kung University
    Inventors: Yon-Hua TZENG, Chih-Yi Liu, Chen-Han Huang, Hsing-Ying Lin, Hsiang-Chen Chui, Kyaw-Oo Lau, Shih-Tse Chen, Cheng-Wen Huang
  • Publication number: 20120037792
    Abstract: A photo-sensitive composite film is disclosed, which includes plural metal nano-particles and a porous anodized aluminum oxide film. The nanoparticles can be hollow or solid with unrestricted shapes of varying diameters and lengths. The plural metal nanoparticles are completely contained in holes and attached to the bottom of the holes of the anodized aluminum oxide film, and the electrical conductivity of the photo-sensitive anodized aluminum oxide film can be changed by light exposure on the metal nanoparticles from surfaces of the anodized aluminum oxide film. The structure of the photo-sensitive anodized aluminum oxide film of the present invention is uncomplicated and the manufacturing steps thereof are simple, and therefore the photo-sensitive anodized aluminum oxide film of the present invention is of great commercial value. Also, a method of manufacturing the above photo-sensitive composite film and a photo-switched device including the same are disclosed.
    Type: Application
    Filed: August 15, 2011
    Publication date: February 16, 2012
    Applicant: National Cheng Kung University
    Inventors: Yon-Hua TZENG, Chih-Yi Liu, Kyaw-Oo Kyaw, Hsiang-Chen Chui, Chen-Han Huang, Hsing-Ying Lin
  • Patent number: 7459371
    Abstract: A method for non-volatile memory fabrication is provided, in which a substrate is provided, a bottom electrode is formed on the substrate, a solution with precursors of Zr and Sr is coated on the bottom electrode, the solution on the bottom electrode surface is dried and then fired to form a resistor layer of SrZrO3, and a top electrode is formed on the resistor layer.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: December 2, 2008
    Assignee: Winbond Electronics Corp.
    Inventors: Tseung-Yuen Tseng, Chih-Yi Liu, Chun-Chieh Chuang
  • Patent number: 7453565
    Abstract: This invention relates to methods of preparing substrates that enhance the Raman signal of analytes in surface-enhanced Raman spectroscopy (SERS). The SERS-active substrate comprises an array of metal nanoparticles at least partially embedded in a template. The substrate's uniform and readily reproducible SERS-active properties with a wide range of analyte concentrations substantially enhance the power and utility of SERS. This invention also provides sensors, as well as Raman instruments, comprising the SERS-active substrates.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: November 18, 2008
    Assignee: Academia Sinica
    Inventors: Yuh-Lin Wang, Huai-Hsien Wang, Chih-Yi Liu, Juen-Kai Wang
  • Patent number: 7323733
    Abstract: A nonvolatile memory and a fabrication method thereof. The nonvolatile memory includes a substrate, a bottom electrode deposited on the substrate, a resistor layer deposited on the bottom electrode, and a top electrode on the resistor layer. The bottom electrode includes LaNiO3 and the resistor layer includes doped SrZrO3.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: January 29, 2008
    Assignee: Winbond Electronics Corp.
    Inventors: Tseung-Yuen Tseng, Chih-Yi Liu, Pei-Hsun Wu
  • Publication number: 20070285657
    Abstract: This invention relates to methods of preparing substrates that enhance the Raman signal of analytes in surface-enhanced Raman spectroscopy (SERS). The SERS-active substrate comprises an array of metal nanoparticles at least partially embedded in a template. The substrate's uniform and readily reproducible SERS-active properties with a wide range of analyte concentrations substantially enhance the power and utility of SERS. This invention also provides sensors, as well as Raman instruments, comprising the SERS-active substrates.
    Type: Application
    Filed: June 13, 2006
    Publication date: December 13, 2007
    Applicant: ACADEMIA SINICA
    Inventors: Yuh-Lin WANG, Huai-Hsien WANG, Chih-Yi LIU, Juen-Kai WANG
  • Publication number: 20060286762
    Abstract: A method for non-volatile memory fabrication is provided, in which a substrate is provided, a bottom electrode is formed on the substrate, a solution with precursors of Zr and Sr is coated on the bottom electrode, the solution on the bottom electrode surface is dried and then fired to form a resistor layer of SrZrO3, and a top electrode is formed on the resistor layer.
    Type: Application
    Filed: December 5, 2005
    Publication date: December 21, 2006
    Inventors: Tseung-Yuen Tseng, Chih-Yi Liu, Chun-Chieh Chuang
  • Publication number: 20060131628
    Abstract: A nonvolatile memory and a fabrication method thereof. The nonvolatile memory includes a substrate, a bottom electrode deposited on the substrate, a resistor layer deposited on the bottom electrode, and a top electrode on the resistor layer. The bottom electrode includes LaNiO3 and the resistor layer includes doped SrZrO3.
    Type: Application
    Filed: April 19, 2005
    Publication date: June 22, 2006
    Inventors: Tseung-Yuen Tseng, Chih-Yi Liu, Pei-Hsun Wu