Patents by Inventor Chih-Yin KUO

Chih-Yin KUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device having a gate structure with different lengths between laterally etched spacers
    Patent number: 12142666
    Abstract: The present disclosure relates to a semiconductor device including a substrate and a pair of spacers on the substrate. Each spacer of the pair of spacers includes an upper portion having a first width and a lower portion under the upper portion and having a second width different from the first width. The semiconductor device further includes a gate structure between the pair of spacers. The gate structure has an upper gate length and a lower gate length that is different from the upper gate length.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: November 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yu Kuo, Shang-Yun Huang, Chih-Yin Kuo
  • Method for laterally etching gate spacers
    Patent number: 11705502
    Abstract: The present disclosure relates to a semiconductor device including a substrate and a pair of spacers on the substrate. Each spacer of the pair of spacers includes an upper portion having a first width and a lower portion under the upper portion and having a second width different from the first width. The semiconductor device further includes a gate structure between the pair of spacers. The gate structure has an upper gate length and a lower gate length that is different from the upper gate length.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: July 18, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yu Kuo, Shang-Yun Huang, Chih-Yin Kuo
  • LATERALLY ETCHED SPACERS FOR SEMICONDUCTOR DEVICE
    Publication number: 20220376087
    Abstract: The present disclosure relates to a semiconductor device including a substrate and a pair of spacers on the substrate. Each spacer of the pair of spacers includes an upper portion having a first width and a lower portion under the upper portion and having a second width different from the first width. The semiconductor device further includes a gate structure between the pair of spacers. The gate structure has an upper gate length and a lower gate length that is different from the upper gate length.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 24, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yu KUO, Shang-Yun HUANG, Chih-Yin KUO
  • LATERALLY ETCHED SPACERS FOR SEMICONDUCTOR DEVICE
    Publication number: 20210234021
    Abstract: The present disclosure relates to a semiconductor device including a substrate and a pair of spacers on the substrate. Each spacer of the pair of spacers includes an upper portion having a first width and a lower portion under the upper portion and having a second width different from the first width. The semiconductor device further includes a gate structure between the pair of spacers. The gate structure has an upper gate length and a lower gate length that is different from the upper gate length.
    Type: Application
    Filed: July 23, 2020
    Publication date: July 29, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yu KUO, Shang-Yun HUANG, Chih-Yin KUO