Patents by Inventor Chih-Yuan Yu

Chih-Yuan Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Publication number: 20240096996
    Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Publication number: 20150063068
    Abstract: A sensing device and a positioning method are disclosed. The sensing device is mounted around a display module to detect an object. The display module includes a display screen for displaying an image. The sensing device includes a first sonic wave transceiver, a second sonic wave transceiver, and a control module. The first and second sonic wave transceivers are respectively configured for transmitting a first sonic wave and a second sonic wave, and receiving a first reflected sonic wave and a second reflected sonic wave generated based on the first and second sonic waves, respectively. A frequency of the first and second sonic waves is between 50 KHz and 70 KHz. The control module is configured for controlling the first and second sonic wave transceivers, and for calculating a position of the object relative to the display module based on the first and second reflected sonic waves.
    Type: Application
    Filed: August 11, 2014
    Publication date: March 5, 2015
    Inventors: Chih-Yuan YU, Fang-Ching LEE, Chih-Chiang CHEN
  • Publication number: 20120114139
    Abstract: The present invention relates to a suppressing noise system applied in a mobile device, comprises: at least two microphones are used for respectively transmitting a first audio signal with noise and a second audio signal with noise; a pre-processing unit is coupled to the at least two microphones for oversampling the first and second audio signals, downsampling the sampled first and second audio signals, and then generating a first adjusted signal and a second adjusted signal; and a suppressing noise device is coupled to the pre-processing device for filtering noise in the first and second adjusted signals once again, and outputting a third audio signal.
    Type: Application
    Filed: April 8, 2011
    Publication date: May 10, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shih-Yu PAN, Chih-Yuan Yu, Jiun-Bin Huang, Min-Qiao Lu
  • Patent number: 7925380
    Abstract: System and method for implementing integrated transportation control in a wafer fabrication facility are described. One embodiment is a factory automation system for a wafer fabrication facility (“fab”) comprising a plurality of bays, wherein each of the bays comprise a plurality of equipment interconnected by an intrabay overhead transport (“OHT”) system, and first and second interbay OHT systems each for interconnecting the intrabay OHT systems. The factory automation system comprises a manufacturing execution system (“MES”) for providing lot information regarding wafers being processed in the fab, a material control system (“MCS”) for providing traffic information regarding transportation of wafers in the fab, and an integrated transportation control (“ITC”) system for using the lot information from the MES and the traffic information from the MCS for selecting a destination and a route to the selected destination for a wafer carrier containing wafers in response to a transfer request.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: April 12, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yuan Yu, Ren-Chyi You, Ming Wang
  • Publication number: 20100138016
    Abstract: A cross-semiconductor fabrication (fab) facility transportation system and method for cross-fab transportation is provided. An exemplary method for cross-fab transportation includes providing a unified control unit that facilitates transportation of one or more wafers across a plurality of wafer fabrication facilities (“fabs”). The unified control unit facilitates selecting a wafer at a first location in a first automated material handling system (“AMHS”) of a first fab for transfer to a second AMHS of a second fab; selecting a second location within the second AMHS of the second fab; selecting a route for transferring the wafer between the first location and the second location; and issuing instructions to the first and second fabs, such that the wafer is transferred from the first location to the second location.
    Type: Application
    Filed: February 2, 2010
    Publication date: June 3, 2010
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsieh-Chi Chen, Chih-Yuan Yu
  • Patent number: 7684888
    Abstract: In one aspect a factory automation system for a wafer fab is provided. The factory automation system is adapted to facilitate cross-AMHS transfers of wafer lots within a semiconductor foundry. The factory automation system may include a first MCS and an associated first AMHS; a second MCS and an associated second AMHS; and a third MCS and an associated third AMHS. The system may also include a first bridge connecting the first AMHS and the second AMHS to allow a FOUP to travel between the first AMHS and the second AMHS. The system may also include a second bridge connecting the second AMHS and the third AMHS to allow a FOUP to travel between the second AMHS and the third AMHS. The system also includes a unified control unit in communication with the first, second, and third MCSs, the unified control unit for coordinating transfers of FOUPs between the first, second, and third AMHSs.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: March 23, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsieh-Chi Chen, Chih-Yuan Yu
  • Publication number: 20080281456
    Abstract: In one aspect a factory automation system for a wafer fab is provided. The factory automation system is adapted to facilitate cross-AMHS transfers of wafer lots within a semiconductor foundry. The factory automation system may include a first MCS and an associated first AMHS; a second MCS and an associated second AMHS; and a third MCS and an associated third AMHS. The system may also include a first bridge connecting the first AMHS and the second AMHS to allow a FOUP to travel between the first AMHS and the second AMHS. The system may also include a second bridge connecting the second AMHS and the third AMHS to allow a FOUP to travel between the second AMHS and the third AMHS. The system also includes a unified control unit in communication with the first, second, and third MCSs, the unified control unit for coordinating transfers of FOUPs between the first, second, and third AMHSs.
    Type: Application
    Filed: May 8, 2007
    Publication date: November 13, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsieh-Chi Chen, Chih-Yuan Yu
  • Publication number: 20080021593
    Abstract: System and method for implementing integrated transportation control in a wafer fabrication facility are described. One embodiment is a factory automation system for a wafer fabrication facility (“fab”) comprising a plurality of bays, wherein each of the bays comprise a plurality of equipment interconnected by an intrabay overhead transport (“OHT”) system, and first and second interbay OHT systems each for interconnecting the intrabay OHT systems. The factory automation system comprises a manufacturing execution system (“MES”) for providing lot information regarding wafers being processed in the fab, a material control system (“MCS”) for providing traffic information regarding transportation of wafers in the fab, and an integrated transportation control (“ITC”) system for using the lot information from the MES and the traffic information from the MCS for selecting a destination and a route to the selected destination for a wafer carrier containing wafers in response to a transfer request.
    Type: Application
    Filed: July 19, 2006
    Publication date: January 24, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Yuan YU, Ren-Chyi YOU, Ming WANG