Abstract: It is a method for manufacturing a plasma display panel having a discharge space, and a protective layer opposed to the discharge space. A gas containing a reducing organic gas is introduced into the discharge space, and the protective layer is exposed to the reducing organic gas. Then, the reducing organic gas is emitted from the discharge space. Then, a discharge gas is enclosed in the discharge space. The protective layer contains at least a first metal oxide and a second metal oxide. Furthermore, the protective layer has at least one peak in an X-ray diffraction analysis. The peak exists between a first peak of the first metal oxide in the X-ray diffraction analysis, and a second peak of the second metal oxide in the X-ray analysis. The first peak and the second peak show the same surface orientation as a surface orientation shown by the peak.

Abstract: By introducing a gas containing a reducing organic gas into the discharge space, the protective layer is exposed to the reducing organic gas. Then, the reducing organic gas is exhausted from the discharge space. Then, a discharge gas is enclosed to the discharge space. The protective layer includes a base film made of magnesium oxide, and a plurality of metal oxide particles dispersed over the base film. The metal oxide particle includes at least a first metal oxide and a second metal oxide. Moreover, the metal oxide particle has at least one peak in an X-ray diffraction analysis. The peak is located between a first peak in the X-ray diffraction analysis of the first metal oxide and a second peak in the X-ray diffraction analysis of the second metal oxide. The first peak and the second peal have the same plane orientation as the plane orientation indicated by the peak.

Abstract: By introducing a gas containing a reducing organic gas into the discharge space, the protective layer is exposed to the reducing organic gas. Then, the reducing organic gas is exhausted from the discharge space. Then, a discharge gas is enclosed to the discharge space. The protective layer includes a nano particle layer formed by nano crystal particles of metal oxides containing at least a first metal oxide and a second metal oxide. Moreover, the nano particle layer has at least one peak in an X-ray diffraction analysis. The peak is located between a first peak in the X-ray diffraction analysis of the first metal oxide and a second peak in the X-ray diffraction analysis of the second metal oxide. The first peak and the second peal have the same plane orientation as the plane orientation indicated by the peak.

Abstract: A plasma display panel has a front plate, and a rear plate arranged so as to be opposed to the front plate. The front plate has a display electrode, a dielectric layer to cover the display electrode, and a protective layer to cover the dielectric layer. The protective layer has a luminescence peak in a wavelength ranging from not less than 350 nm to not more than 550 nm under irradiation of light having a wavelength of 146 nm. In addition, the protective layer has a luminescence peak in a wavelength ranging from not less than 350 nm to not more than 550 nm under irradiation of light having a wavelength of 173 nm. A ratio A/B between a peak intensity of luminescence under the light having the wavelength of 146 nm and a peak intensity of luminescence under the light having the wavelength of 173 nm falls within a range from more than 3.0 to not more than 7.0.

Abstract: Disclosed is a method of manufacturing a plasma display panel having a discharge space and a protection layer facing the discharge space. The protection layer is exposed to the reducing organic gas by introducing gases containing the reducing organic gas into the discharge space. Then, the reducing organic gas is exhausted from the discharge space. Then, the discharge gas is hermetically enclosed in the discharge space.

Abstract: A plasma display panel has a front plate, and a rear plate arranged so as to be opposed to the front plate. The front plate has a display electrode, a dielectric layer to cover the display electrode, and a protective layer to cover the dielectric layer. The protective layer has a luminescence peak in a wavelength ranging from not less than 350 nm to not more than 550 nm under irradiation of light having a wavelength of 146 nm. In addition, the protective layer has a luminescence peak in a wavelength ranging from not less than 350 nm to not more than 550 nm under irradiation of light having a wavelength of 173 nm. A ratio A/B between a peak intensity of luminescence under the light having the wavelength of 146 nm and a peak intensity of luminescence under the light having the wavelength of 173 nm falls within a range from more than 3.0 to not more than 7.0.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for covering the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel includes a pair of substrates disposed to face each other, with a discharge space sandwiched therebetween; plural surface-discharge electrode pairs comprising scanning electrodes and common electrodes formed at an inner surface of the front substrate (one of the pair of substrates); and a dielectric layer covering the surface-discharge electrode pairs with respect to the discharge space. Extraction electrode portions of the scanning electrodes are led to an end portion of one side of the front substrate. Extraction electrode portions of the common electrodes are led to an end portion of the other side of the front substrate. An island-shaped assembly electrode terminal portion that commonly connects the extraction electrode portions of the common electrodes is disposed. Plural micro openings are defined in the assembly electrode terminal portion to form a mesh.

Abstract: An object of the present invention is to provide a high definition PDP screen without lowering the PDP luminescence efficiency. The display panel is provided with a plurality of cells that are arranged in a matrix, each of the plurality of cells emitting a different unique luminescent color; wherein a plurality of cells each bearing first luminescent color are disposed on every other line in a vertical direction, and a line of cells each having second luminescent color and a line of cells each having third luminescent color are alternated with a line of said plurality of cells having first luminescent color respectively therebetween.

Abstract: A plasma display panel includes: a plurality of row electrode pairs (X, Y) provided on a front glass substrate (10); a protective layer (12) on the front glass substrate (10); and a plurality of column electrodes (D) provided in a back substrate (13) at intersections with the row electrode pairs (X, Y) to form discharge cells (C) in the discharge space (S). An ultraviolet region light emissive layer (17) having persistence characteristics allowing continuous emission of ultraviolet light as a result of excitation by ultraviolet rays having 0.1 msec or more of a wavelength is provided at a site facing each discharge cell (C) between the front glass substrate (10) and the back glass substrate (13).

Abstract: A plasma display panel includes a pair of substrates disposed to face each other, with a discharge space sandwiched therebetween; plural surface-discharge electrode pairs comprising scanning electrodes and common electrodes formed at an inner surface of the front substrate (one of the pair of substrates); and a dielectric layer covering the surface-discharge electrode pairs with respect to the discharge space. Extraction electrode portions of the scanning electrodes are led to an end portion of one side of the front substrate. Extraction electrode portions of the common electrodes are led to an end portion of the other side of the front substrate. An island-shaped assembly electrode terminal portion that commonly connects the extraction electrode portions of the common electrodes is disposed. Plural micro openings are defined in the assembly electrode terminal portion to form a mesh.

Abstract: In a surface-discharge-type alternating-current plasma display panel, a discharge cell is divided into two cells: a display discharge cell C1 providing for a sustaining discharge between transparent electrodes Xa, Ya of row electrodes X, Y; and an addressing discharge cell C2 which is opposite a bus electrode Yb of the row electrode Y, giving rise to an addressing discharge in association with a column electrode D, to provide for the addressing discharge between the bus electrode Yb of the row electrode Y and a column electrode D. The display discharge cells C1 and the addressing discharge cells C2 of the discharge cells are interposed in alternate positions in the column direction so as to arrange the addressing discharge cells C2 in a back-to-back position in the column direction.

Abstract: In a plasma display panel, a partition wall 15 surrounds each of discharge cells to define the discharge cells. Each of the discharge cells is divided by a second transverse wall 15B into a display discharge cell C1 which is opposite transparent electrodes Xa, Ya of paired row electrodes X, Y to provide for a sustaining discharge; and an addressing discharge cell C2 which is opposite a bus electrode Yb of the row electrode Y to provide for an addressing discharge caused between the bus electrode Yb and a column electrode D. A clearance r is provided between the discharge cell C1 and the addressing discharge cell C2 for communication between the cells C1 and C2.

Abstract: A plasma display panel comprises a front substrate and a rear substrate, a plurality of row electrode pairs provided on the inner surface of the front substrate, a dielectric layer provided on the inner surface of the front substrate for coverring the row electrode pairs, a plurality of column electrodes provided on the inner surface of the rear substrate, a partition wall assembly provided between the front substrate and the rear substrate, said partition wall assembly including a plurality of longitudinal partition walls and a plurality of lateral partition walls, forming a plurality of discharge cells. In particular, the dielectric layer has a plurality of projection portions located corresponding to and protruding toward the lateral partition walls of the partition wall assembly, in a manner such that there would be no slots formed between the dielectric layer and the lateral partition walls.

Abstract: A plasma display panel includes a front glass substrate 1 having the back surface on which a plurality of pairs of row electrodes X1, Y1 are formed, a back glass substrate 4 on which column electrodes D are formed, and partition walls 6 made of dielectric materials and defining individual discharge cells C, in which at least either of the row electrodes X1 and Y1 is placed at a position shifted relatively in the column direction toward decreasing the overlapping of the row electrode and the partition wall in reference to the partition wall 6.