Patents by Inventor Chiharu Nozaki

Chiharu Nozaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor light emitting device and its manufacturing method
    Patent number: 6924163
    Abstract: Efficiency of leading out light released from an active layer, i.e. the external quantum efficiency, can be improved remarkably by processing a light lead-out surface to have an embossment. A layer containing a p-type dopant like magnesium (Mg) is deposited near the surface of a p-type GaN layer to diffuse it there, and a p-side electrode is made on the p-type GaN layer after removing the deposited layer. This results in ensuring ohmic contact with the p-side electrode, preventing exfoliation of the electrode and improving the reliability.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: August 2, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Koichi Nitta, Chiharu Nozaki
  • Semiconductor light emitting device and its manufacturing method
    Publication number: 20030062530
    Abstract: Efficiency of leading out light released from an active layer, i.e. the external quantum efficiency, can be improved remarkably by processing a light lead-out surface to have an embossment. A layer containing a p-type dopant like magnesium (Mg) is deposited near the surface of a p-type GaN layer to diffuse it there, and a p-side electrode is made on the p-type GaN layer after removing the deposited layer. This results in ensuring ohmic contact with the p-side electrode, preventing exfoliation of the electrode and improving the reliability.
    Type: Application
    Filed: October 25, 2002
    Publication date: April 3, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA.
    Inventors: Haruhiko Okazaki, Koichi Nitta, Chiharu Nozaki
  • Nitride semiconductor LED with embossed lead-out surface
    Patent number: 6495862
    Abstract: Efficiency of leading out light released from an active layer, i.e. the external quantum efficiency, can be improved remarkably by processing a light lead-out surface to have an embossment. A layer containing a p-type dopant like magnesium (Mg) is deposited near the surface of a p-type GaN layer to diffuse it there, and a p-side electrode is made on the p-type GaN layer after removing the deposited layer. This results in ensuring ohmic contact with the p-side electrode, preventing exfoliation of the electrode and improving the reliability.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: December 17, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruhiko Okazaki, Koichi Nitta, Chiharu Nozaki
  • Nitride semiconductor light emitting device and its manufacturing method
    Patent number: 6121634
    Abstract: In a nitride compound semiconductor light emitting device, an In.sub.0.3 Ga.sub.0.7 N/GaN multi-quantum well active layer 105 or an In.sub.0.1 Ga.sub.0.9 N/GaN multi-quantum well adjacent layer 104 is made as a saturable absorptive region so that self-pulsation occurs there. Thus, the device ensures self-pulsation with a high probability with a simple structure, and satisfies requirements for use as an optical head for reading data from an optical disc.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: September 19, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Genichi Hatakoshi, Masaaki Onomura, Hidetoshi Fujimoto, Norio Iizuka, Chiharu Nozaki, Johji Nishio, Masayuki Ishikawa
  • Semiconductor device
    Patent number: 6072203
    Abstract: In an HEMT, a channel forming layer is arranged above a semi-insulating substrate via a buffer layer. A spacer layer is arranged on the channel forming layer and an electron supplying layer and a Schottky contact layer are sequentially arranged on the spacer layer. A diffusion preventing layer, for preventing a metal element of a gate electrode from diffusing into the channel forming layer, is arranged in the Schottky contact layer.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: June 6, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Chiharu Nozaki, Minoru Amano, Yukie Nishikawa, Masayuki Sugiura, Takao Noda, Aki Sasaki, Yasuo Ashizawa