Patents by Inventor Chihiro Endoh

Chihiro Endoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5485094
    Abstract: A test pattern preparation unit divides output pins of each circuit element mounted on a printed wiring board into a group to which a logical value 0 is assignable and a group to which a logical value 1 is assignable, to thereby prepare a test pattern for detecting short-circuit failures between the groups. If short-circuit failures are undetectable among output pins in a given group, these output pins are further divided into a group to which the logical value 0 is assignable and a group to which the logical value 1 is assignable. In this way, the output pins are repeatedly divided into groups, to form test patterns for detecting short-circuit failures. These test patterns are applied to the board through a tester to detect short-circuit failures.
    Type: Grant
    Filed: March 17, 1994
    Date of Patent: January 16, 1996
    Assignee: Fujitsu Limited
    Inventors: Chihiro Endoh, Toshihiko Tada