Patents by Inventor Chihiro Ogawa
Chihiro Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11938471Abstract: A metal porous body has a skeleton of a three-dimensional network structure, an outer layer portion of the skeleton having a second pore smaller in size than a first pore formed by the skeleton, wherein the outer layer portion is a metal layer, and a water vapor reforming catalyst is supported in the outer layer portion.Type: GrantFiled: June 21, 2019Date of Patent: March 26, 2024Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Chihiro Hiraiwa, Naho Mizuhara, Mitsuyasu Ogawa, Takahiro Higashino, Hiromasa Tawarayama, Masatoshi Majima, Yoshitaka Ogasawara
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Patent number: 6380977Abstract: In a solid state image pickup device of the invention, photoelectric transforming regions in each of which a plurality of photoelectric transforming parts are arranged at predetermined intervals in a first predetermined direction and charge transfer regions extending in the first direction are alternately arranged in a second predetermined direction which perpendicularly crosses the first predetermined direction. There are also provided bridge regions formed in regions sandwiched by two photoelectric transforming parts in order to connect the charge transfer regions neighboring in the second predetermined direction. The bridge region has: a first bridge wiring extending in the second predetermined direction; an oxide film formed so as to cover the periphery of the first bridge wiring; and second and forth bridge wirings formed via the oxide film on the side wall part of the first bridge wiring in the first predetermined direction.Type: GrantFiled: February 24, 1998Date of Patent: April 30, 2002Assignee: NEC CorporationInventor: Chihiro Ogawa
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Patent number: 6312970Abstract: In a CCD type solid state image pickup device including a semiconductor substrate having photo/electro conversion portions and a first insulating layer formed on the semiconductor substrate, a plurality of charge transfer electrodes are formed on the first insulating layer and are a double structure formed by a first conductive layer and a second conductive layer having a lower resistance value than the first conductive layer. A second insulating layer is interposed between two adjacent ones of the charge transfer electrodes.Type: GrantFiled: August 9, 2000Date of Patent: November 6, 2001Assignee: NEC CorporationInventor: Chihiro Ogawa
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Patent number: 6291811Abstract: A solid state image sensing element has a miniature lens buried in a transparent interlayer insulating layer over a photo diode formed in a semi-conductor substrate, and the miniature lens occupies an area wider than an area occupied by the photo diode so that the solid state image sensing element is sensitive without sacrifice of production cost.Type: GrantFiled: June 2, 2000Date of Patent: September 18, 2001Assignee: NEC CorporationInventor: Chihiro Ogawa
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Patent number: 6194749Abstract: In a CCD type solid state image pickup device including a semiconductor substrate having photo/electro conversion portions and a first insulating layer formed on the semiconductor substrate, a plurality of charge transfer electrodes are formed on the first insulating layer and are a double structure formed by a first conductive layer and a second conductive layer having a lower resistance value than the first conductive layer. A second insulating layer is interposed between two adjacent ones of the charge transfer electrodes.Type: GrantFiled: July 23, 1998Date of Patent: February 27, 2001Assignee: NEC CorporationInventor: Chihiro Ogawa
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Patent number: 6188119Abstract: A semiconductor device is disclosed that has a barrier metal layer between a silicon electrode and a metal electrode. For providing contacts on a charge transfer electrode made up of polysilicon, between the electrode and a shield film, which is a conductive film, without causing changes in channel potential or threshold voltage or influencing the charge transfer rate, a barrier metal layer composed of a metal silicide is provided between the shield film and the charge transfer electrode.Type: GrantFiled: February 4, 1998Date of Patent: February 13, 2001Assignee: NEC CorporationInventors: Chihiro Ogawa, Yasuaki Hokari
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Patent number: 6114718Abstract: A dipping in potential well due to direct contact between transfer electrodes and metal wiring causes a drop in transfer efficiency through a CCD register. In order to eliminate or at least reduce the potential dipping, an N.sup.- -type impurity layer that functions as a CCD channel is formed with N.sup.-- -type impurity regions that have impurity concentration lower than that of the N.sup.- -type impurity layer. The N.sup.- -type impurity regions are located below transfer electrodes in alignment with contact apertures.Type: GrantFiled: November 16, 1998Date of Patent: September 5, 2000Assignee: NEC CorporationInventors: Yasuaki Hokari, Chihiro Ogawa
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Patent number: 6104021Abstract: A solid state image sensing element has a miniature lens buried in a transparent interlayer insulating layer over a photo diode formed in a semiconductor substrate, and the miniature lens occupies an area wider than an area occupied by the photo diode so that the solid state image sensing element is sensitive without sacrifice of production cost.Type: GrantFiled: April 8, 1998Date of Patent: August 15, 2000Assignee: NEC CorporationInventor: Chihiro Ogawa
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Patent number: 6097433Abstract: Shunt wirings (12) in the form of a conductive light intercepting film which covers over vertical CCD registers and also serves to supply power, project into locations between adjacent photoelectric transducers (11) in the vertical direction, and the distance between the projecting portions of adjacent ones of the metal wirings is set to 0.2 .mu.m or less and is limited to a distance with which an electric field between adjacent ones of the metal wirings is 10.sup.7 V/cm or less and the adjacent metal wirings do not suffer from short-circuiting.Type: GrantFiled: June 5, 1997Date of Patent: August 1, 2000Assignee: NEC CorporationInventors: Shinichi Kawai, Michihiro Morimoto, Masayuki Furumiya, Chihiro Ogawa, Keisuke Hatano, Yasuaki Hokari, Takashi Sato, Nobuhiko Mutoh, Ichiro Murakami, Shinobu Suwazono, Hiroaki Utsumi, Kouichi Arai, Kozo Orihara, Nobukazu Teranishi, Takao Tamura
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Patent number: 6090640Abstract: A first silicon oxide film, silicon nitride film, and polycrystalline silicon film are formed on the entire surface of a semiconductor substrate. Then, the polycrystalline silicon film is etched to form a first transfer electrode and then, the surface of the first transfer electrode isothermally oxidized to form a second silicon oxide film. Thereafter, a polycrystalline silicon film and a third silicon oxide film are formed on the entire surface and patterned to form a second transfer electrode. A fourth silicon oxide film is formed on the entire surface, and is etched back. Thereafter, the side wall surfaces of the third silicon oxide film and the second transfer electrode are covered with a fourth silicon oxide film. Thereafter, a light shielding film is selectively formed on them.Type: GrantFiled: April 13, 1998Date of Patent: July 18, 2000Assignee: NEC CorporationInventor: Chihiro Ogawa
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Patent number: 6013925Abstract: A first silicon oxide film, silicon nitride film, and polycrystalline silicon film are formed on the entire surface of a semiconductor substrate. Then, the polycrystalline silicon film is etched to form a first transfer electrode and then, the surface of the first transfer electrode is thermally oxidized to form a second silicon oxide film. Thereafter, a polycrystalline silicon film and a third silicon oxide film are formed on the entire surface and patterned to form a second transfer electrode. A fourth silicon oxide film is formed on the entire surface, and is etched back. Thereafter, the side wall surfaces of the third silicon oxide film and the second transfer electrode are covered with a fourth silicon oxide film. Thereafter, a light shielding film is selectively formed on them.Type: GrantFiled: September 30, 1997Date of Patent: January 11, 2000Assignee: NEC CorporationInventor: Chihiro Ogawa
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Patent number: 5904494Abstract: At first, first transfer electrodes are formed selectively on a semiconductor substrate. Then, the surface of the first transfer electrodes are thermally oxidized at a temperature of 850.degree. to 950.degree. C. to form thermal oxide layers. After depositing a polycrystalline silicon layer over the substrate, rapid annealing is performed the first transfer electrodes, the thermal oxide layers and the polycrystalline silicon layer by a halogen lamp. Thus, after forming the polycrystalline silicon layer to be second transfer electrodes, annealing is performed by heating by lamp. Therefore, the thermal oxide layers can be efficiently heated by the irradiation heat from the polycrystalline silicon layer located upper side thereof and also from the first electrodes located at backside. Accordingly, the tolerance voltage of the thermal oxide layer can be improved and the thickness of the thermal oxide layer can be made thinner.Type: GrantFiled: April 9, 1997Date of Patent: May 18, 1999Assignee: NEC CorporationInventors: Yasuaki Hokari, Chihiro Ogawa
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Patent number: 5510642Abstract: An insular shaped polycrystalline silicon film is formed by adhering its entire bottom face to the surface of a insulation film which is formed on the main face of a silicon substrate. A resistance element which contains designated impurities is formed in the central part of the polycrystalline silicon film. A non-doping region which essentially does not contain impurities and is adheres to all the sides of the resistance element, is positioned on the peripheral region except for the central part of the polycrystalline silicon film. By performing heat treatment when a non-doping amorphous silicon pattern is formed on the insulating film, the amorphous silicon pattern is convened to a non-doping polycrystalline silicon pattern. By using this method, a semiconductor device which has only small variances in its resistance value, which provides more efficient heat radiation, and which enables higher integration of a silicon substrate can be obtained.Type: GrantFiled: December 16, 1994Date of Patent: April 23, 1996Assignee: NEC CorporationInventor: Chihiro Ogawa
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Patent number: 5426067Abstract: A method for manufacturing a semiconductor device in which an opening is formed in an insulation film laid on a semiconductor substrate, and in which an annular trench that is narrower than a minimum width obtained by lithography is formed in the semiconductor substrate along the opening in a self-aligned manner. The method includes the steps of: forming a first insulation film on a main surface of a semiconductor substrate; forming an opening in the first insulation film; forming an annular film along the inner sidewall of the opening; forming a second insulation film on the surface of the semiconductor substrate surrounded by the annular film; removing the annular film to cause the semiconductor substrate to be annularly exposed; forming an annular trench by etching the exposed area of the semiconductor substrate; and forming a film layer containing at least a third insulation film over the entire main surface of the semiconductor substrate including the inside of the annular trench.Type: GrantFiled: August 18, 1994Date of Patent: June 20, 1995Assignee: NEC CorporationInventor: Chihiro Ogawa
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Patent number: 5395893Abstract: A polypropylene resin composition which comprises (A) 100 parts by weight of polypropylene, (B) 20-50 parts by weight of at least one elastomer selected from an ethylenic elastomer, an hydrogenated styrene-butadiene copolymer and a hydrogenated styrene-isoprene block copolymer, (C) 0.3.about.20 parts by weight of polycarbonatediol having a skeleton of aliphatic carbonate with both terminals being a hydroxyl group and (D) 0.about.50 parts by weight of an inorganic filler. The resin composition can provide a molded article having a good adhesive property to a film applied thereon without pretreatment by a halogen-containing solvent.Type: GrantFiled: June 3, 1993Date of Patent: March 7, 1995Assignee: Mitsui Toatsu Chemicals, Inc.Inventors: Keigo Suehiro, Katsuyuki Nitta, Takeaki Inokuma, Chihiro Ogawa, Osamu Aoki, Kenji Hamabe, Atsushi Takeuchi
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Patent number: 5324771Abstract: A coated molded article having good adhesion to a coating film and resistance to gasohol as well as excellent appearance can be obtained by applying a primer coating to the surface of a molded article or irradiating the surface with plasma without applying any washing-treatment with a halogen atom-containing organic solvent and then applying a top coat onto the article, if the molded article is formed from a resin composition comprising (A)a polypropylene; (B)a specific ethylene-propylene-diene terpolymer rubber; (C) a specific ethylene-propylene copolymer rubber; and (D) a specific polyhydroxypolyolefin, the amounts of these components (A) to (D) satisfying the following relations:10.ltoreq.[(B)+(C)]/[(A)+(B)+(C)].ltoreq.60 (% by weight)1.ltoreq.(C)/[(B)+(C)].ltoreq.50 (% by weight)0.5.ltoreq.(D)/[(A)+(B)+(C)+(D)].ltoreq.Type: GrantFiled: April 28, 1992Date of Patent: June 28, 1994Assignees: Mitsui Toatsu Chemicals, Inc., Honda Giken Kogyo Kabushi KaishaInventors: Keigo Suehiro, Katsuyuki Nitta, Katsumi Sekiguchi, Takeaki Inokuma, Chihiro Ogawa, Osamu Aoki, Kenji Hamabe, Atsushi Takeuchi